;=========================== begin_copyright_notice ============================
;
; Copyright (C) 2017-2024 Intel Corporation
;
; SPDX-License-Identifier: MIT
;
;============================ end_copyright_notice =============================

;; Test this pass doesn't crash
;; Root cause: A vector instruction is mapped into a scalar sequence.
;;                When handeleing the instruction and replacing it with another.
;;               the mapping needs to be updated with the new instruction

; RUN: igc_opt -igc-vectorpreprocess -S %s -o %t.ll

; CHECK: target

target triple = "igil_32_GEN9"

%struct.sSin_Table_Type = type { [256 x [4 x i32]], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.sReduction_Table_Type = type { [256 x [3 x i32]] }

@collisionObjectPositionArray = addrspace(2) constant [36 x float] [float 2.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0xC010666660000000, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0xBFFB333340000000, float 3.500000e+00, float 0xBFC99999A0000000, float 0.000000e+00, float 0xBFFB333340000000, float 0.000000e+00, float 0x400E666660000000, float 0.000000e+00, float 0xBFFB333340000000, float 0.000000e+00, float 0xC00E28F5C0000000, float 0.000000e+00, float 0xC010666660000000, float 0.000000e+00, float -7.500000e+00, float 0.000000e+00, float 0xC010666660000000, float 0.000000e+00, float -1.250000e+01, float 0.000000e+00, float 0xC013666660000000, float 3.500000e+00, float 0x400828F5C0000000, float 0.000000e+00, float 0xC013666660000000, float 0x4019AE1480000000, float 0xBFD3333340000000, float 0.000000e+00], align 4
@__ocl_svml_ssin_data = addrspace(2) constant %struct.sSin_Table_Type { [256 x [4 x i32]] [[4 x i32] [i32 0, i32 0, i32 0, i32 1065353216], [4 x i32] [i32 -1180833825, i32 1019808432, i32 -1341797992, i32 1065353216], [4 x i32] [i32 -1164058168, i32 1028193072, i32 -1326505345, i32 1065353216], [4 x i32] [i32 -1154379112, i32 1033283845, i32 -1319952799, i32 1065353216], [4 x i32] [i32 -1147287183, i32 1036565814, i32 -1334471947, i32 1065353216], [4 x i32] [i32 -1141477828, i32 1039839859, i32 -1323996977, i32 1065353216], [4 x i32] [i32 -1137617662, i32 1041645699, i32 837346836, i32 1065353216], [4 x i32] [i32 -1133431285, i32 1043271842, i32 823224313, i32 1065353216], [4 x i32] [i32 -1130534864, i32 1044891074, i32 -1327131011, i32 1065353216], [4 x i32] [i32 -1127805868, i32 1046502419, i32 833086710, i32 1065353216], [4 x i32] [i32 -1124761340, i32 1048104908, i32 -1323576291, i32 1065353216], [4 x i32] [i32 -1122738292, i32 1049136787, i32 824999326, i32 1065353216], [4 x i32] [i32 -1120903339, i32 1049927729, i32 846027248, i32 1065353216], [4 x i32] [i32 -1118913654, i32 1050712805, i32 -1304524384, i32 1065353216], [4 x i32] [i32 -1116770434, i32 1051491540, i32 -1306178046, i32 1065353216], [4 x i32] [i32 -1115079918, i32 1052263466, i32 -1301259354, i32 1065353216], [4 x i32] [i32 -1113856756, i32 1053028117, i32 836097324, i32 1065353216], [4 x i32] [i32 -1112558900, i32 1053785034, i32 829045603, i32 1065353216], [4 x i32] [i32 -1111187133, i32 1054533760, i32 840832460, i32 1065353216], [4 x i32] [i32 -1109742280, i32 1055273845, i32 -1311127692, i32 1065353216], [4 x i32] [i32 -1108225212, i32 1056004842, i32 -1308679879, i32 1065353216], [4 x i32] [i32 -1106966550, i32 1056726311, i32 -1316950871, i32 1065353216], [4 x i32] [i32 -1106137193, i32 1057201213, i32 -1302618110, i32 1065353216], [4 x i32] [i32 -1105273163, i32 1057551771, i32 -1296151730, i32 1065353216], [4 x i32] [i32 -1104374981, i32 1057896922, i32 -1303760153, i32 1065353216], [4 x i32] [i32 -1103443188, i32 1058236458, i32 852349230, i32 1065353216], [4 x i32] [i32 -1102478345, i32 1058570176, i32 -1312316429, i32 1065353216], [4 x i32] [i32 -1101481033, i32 1058897873, i32 848430348, i32 1065353216], [4 x i32] [i32 -1100451853, i32 1059219353, i32 841032635, i32 1065353216], [4 x i32] [i32 -1099391425, i32 1059534422, i32 -1308392637, i32 1065353216], [4 x i32] [i32 -1098604018, i32 1059842890, i32 -1296617162, i32 1065353216], [4 x i32] [i32 -1098043523, i32 1060144571, i32 -1297208014, i32 1065353216], [4 x i32] [i32 -1097468390, i32 1060439283, i32 844097402, i32 1065353216], [4 x i32] [i32 1044518635, i32 1060726850, i32 -1300168697, i32 1056964608], [4 x i32] [i32 1043311911, i32 1061007097, i32 832220140, i32 1056964608], [4 x i32] [i32 1042078039, i32 1061279856, i32 851442039, i32 1056964608], [4 x i32] [i32 1040817765, i32 1061544963, i32 850481524, i32 1056964608], [4 x i32] [i32 1038876298, i32 1061802258, i32 848897600, i32 1056964608], [4 x i32] [i32 1036254719, i32 1062051586, i32 847147240, i32 1056964608], [4 x i32] [i32 1033584979, i32 1062292797, i32 806113028, i32 1056964608], [4 x i32] [i32 1029938589, i32 1062525745, i32 848357914, i32 1056964608], [4 x i32] [i32 1024416170, i32 1062750291, i32 -1300406336, i32 1056964608], [4 x i32] [i32 1013387058, i32 1062966298, i32 841166280, i32 1056964608], [4 x i32] [i32 -1142376888, i32 1063173637, i32 851900755, i32 1056964608], [4 x i32] [i32 -1125494428, i32 1063372184, i32 -1293421531, i32 1056964608], [4 x i32] [i32 -1118935974, i32 1063561817, i32 823789818, i32 1056964608], [4 x i32] [i32 -1114350081, i32 1063742424, i32 -1296288887, i32 1056964608], [4 x i32] [i32 -1111355176, i32 1063913895, i32 -1293212820, i32 1056964608], [4 x i32] [i32 -1108327509, i32 1064076126, i32 854796500, i32 1056964608], [4 x i32] [i32 -1106282579, i32 1064229022, i32 -1298975780, i32 1056964608], [4 x i32] [i32 1035072335, i32 1064372488, i32 840880349, i32 1048576000], [4 x i32] [i32 1031957395, i32 1064506439, i32 851742225, i32 1048576000], [4 x i32] [i32 1025835404, i32 1064630795, i32 -1298948830, i32 1048576000], [4 x i32] [i32 1015605553, i32 1064745479, i32 846006572, i32 1048576000], [4 x i32] [i32 -1142552955, i32 1064850424, i32 -1307723291, i32 1048576000], [4 x i32] [i32 -1124262043, i32 1064945565, i32 851856985, i32 1048576000], [4 x i32] [i32 -1117722376, i32 1065030846, i32 855602635, i32 1048576000], [4 x i32] [i32 1027359369, i32 1065106216, i32 -1305356661, i32 1040187392], [4 x i32] [i32 1018299420, i32 1065171628, i32 -1325966615, i32 1040187392], [4 x i32] [i32 -1154895447, i32 1065227044, i32 -1292769789, i32 1040187392], [4 x i32] [i32 -1126364376, i32 1065272429, i32 838093129, i32 1040187392], [4 x i32] [i32 1010124837, i32 1065307757, i32 852498564, i32 1031798784], [4 x i32] [i32 -1134816446, i32 1065333007, i32 836655967, i32 1031798784], [4 x i32] [i32 -1143220927, i32 1065348163, i32 814009613, i32 1023410176], [4 x i32] [i32 0, i32 1065353216, i32 0, i32 0], [4 x i32] [i32 1004262721, i32 1065348163, i32 814009613, i32 -1124073472], [4 x i32] [i32 1012667202, i32 1065333007, i32 836655967, i32 -1115684864], [4 x i32] [i32 -1137358811, i32 1065307757, i32 852498564, i32 -1115684864], [4 x i32] [i32 1021119272, i32 1065272429, i32 838093129, i32 -1107296256], [4 x i32] [i32 992588201, i32 1065227044, i32 -1292769789, i32 -1107296256], [4 x i32] [i32 -1129184228, i32 1065171628, i32 -1325966615, i32 -1107296256], [4 x i32] [i32 -1120124279, i32 1065106216, i32 -1305356661, i32 -1107296256], [4 x i32] [i32 1029761272, i32 1065030846, i32 855602635, i32 -1098907648], [4 x i32] [i32 1023221605, i32 1064945565, i32 851856985, i32 -1098907648], [4 x i32] [i32 1004930693, i32 1064850424, i32 -1307723291, i32 -1098907648], [4 x i32] [i32 -1131878095, i32 1064745479, i32 846006572, i32 -1098907648], [4 x i32] [i32 -1121648244, i32 1064630795, i32 -1298948830, i32 -1098907648], [4 x i32] [i32 -1115526253, i32 1064506439, i32 851742225, i32 -1098907648], [4 x i32] [i32 -1112411313, i32 1064372488, i32 840880349, i32 -1098907648], [4 x i32] [i32 1041201069, i32 1064229022, i32 -1298975780, i32 -1090519040], [4 x i32] [i32 1039156139, i32 1064076126, i32 854796500, i32 -1090519040], [4 x i32] [i32 1036128472, i32 1063913895, i32 -1293212820, i32 -1090519040], [4 x i32] [i32 1033133567, i32 1063742424, i32 -1296288887, i32 -1090519040], [4 x i32] [i32 1028547674, i32 1063561817, i32 823789818, i32 -1090519040], [4 x i32] [i32 1021989220, i32 1063372184, i32 -1293421531, i32 -1090519040], [4 x i32] [i32 1005106760, i32 1063173637, i32 851900755, i32 -1090519040], [4 x i32] [i32 -1134096590, i32 1062966298, i32 841166280, i32 -1090519040], [4 x i32] [i32 -1123067478, i32 1062750291, i32 -1300406336, i32 -1090519040], [4 x i32] [i32 -1117545059, i32 1062525745, i32 848357914, i32 -1090519040], [4 x i32] [i32 -1113898669, i32 1062292797, i32 806113028, i32 -1090519040], [4 x i32] [i32 -1111228929, i32 1062051586, i32 847147240, i32 -1090519040], [4 x i32] [i32 -1108607350, i32 1061802258, i32 848897600, i32 -1090519040], [4 x i32] [i32 -1106665883, i32 1061544963, i32 850481524, i32 -1090519040], [4 x i32] [i32 -1105405609, i32 1061279856, i32 851442039, i32 -1090519040], [4 x i32] [i32 -1104171737, i32 1061007097, i32 832220140, i32 -1090519040], [4 x i32] [i32 -1102965013, i32 1060726850, i32 -1300168697, i32 -1090519040], [4 x i32] [i32 1050015258, i32 1060439283, i32 844097402, i32 -1082130432], [4 x i32] [i32 1049440125, i32 1060144571, i32 -1297208014, i32 -1082130432], [4 x i32] [i32 1048879630, i32 1059842890, i32 -1296617162, i32 -1082130432], [4 x i32] [i32 1048092223, i32 1059534422, i32 -1308392637, i32 -1082130432], [4 x i32] [i32 1047031795, i32 1059219353, i32 841032635, i32 -1082130432], [4 x i32] [i32 1046002615, i32 1058897873, i32 848430348, i32 -1082130432], [4 x i32] [i32 1045005303, i32 1058570176, i32 -1312316429, i32 -1082130432], [4 x i32] [i32 1044040460, i32 1058236458, i32 852349230, i32 -1082130432], [4 x i32] [i32 1043108667, i32 1057896922, i32 -1303760153, i32 -1082130432], [4 x i32] [i32 1042210485, i32 1057551771, i32 -1296151730, i32 -1082130432], [4 x i32] [i32 1041346455, i32 1057201213, i32 -1302618110, i32 -1082130432], [4 x i32] [i32 1040517098, i32 1056726311, i32 -1316950871, i32 -1082130432], [4 x i32] [i32 1039258436, i32 1056004842, i32 -1308679879, i32 -1082130432], [4 x i32] [i32 1037741368, i32 1055273845, i32 -1311127692, i32 -1082130432], [4 x i32] [i32 1036296515, i32 1054533760, i32 840832460, i32 -1082130432], [4 x i32] [i32 1034924748, i32 1053785034, i32 829045603, i32 -1082130432], [4 x i32] [i32 1033626892, i32 1053028117, i32 836097324, i32 -1082130432], [4 x i32] [i32 1032403730, i32 1052263466, i32 -1301259354, i32 -1082130432], [4 x i32] [i32 1030713214, i32 1051491540, i32 -1306178046, i32 -1082130432], [4 x i32] [i32 1028569994, i32 1050712805, i32 -1304524384, i32 -1082130432], [4 x i32] [i32 1026580309, i32 1049927729, i32 846027248, i32 -1082130432], [4 x i32] [i32 1024745356, i32 1049136787, i32 824999326, i32 -1082130432], [4 x i32] [i32 1022722308, i32 1048104908, i32 -1323576291, i32 -1082130432], [4 x i32] [i32 1019677780, i32 1046502419, i32 833086710, i32 -1082130432], [4 x i32] [i32 1016948784, i32 1044891074, i32 -1327131011, i32 -1082130432], [4 x i32] [i32 1014052363, i32 1043271842, i32 823224313, i32 -1082130432], [4 x i32] [i32 1009865986, i32 1041645699, i32 837346836, i32 -1082130432], [4 x i32] [i32 1006005820, i32 1039839859, i32 -1323996977, i32 -1082130432], [4 x i32] [i32 1000196465, i32 1036565814, i32 -1334471947, i32 -1082130432], [4 x i32] [i32 993104536, i32 1033283845, i32 -1319952799, i32 -1082130432], [4 x i32] [i32 983425480, i32 1028193072, i32 -1326505345, i32 -1082130432], [4 x i32] [i32 966649823, i32 1019808432, i32 -1341797992, i32 -1082130432], [4 x i32] [i32 0, i32 0, i32 0, i32 -1082130432], [4 x i32] [i32 966649823, i32 -1127675216, i32 805685656, i32 -1082130432], [4 x i32] [i32 983425480, i32 -1119290576, i32 820978303, i32 -1082130432], [4 x i32] [i32 993104536, i32 -1114199803, i32 827530849, i32 -1082130432], [4 x i32] [i32 1000196465, i32 -1110917834, i32 813011701, i32 -1082130432], [4 x i32] [i32 1006005820, i32 -1107643789, i32 823486671, i32 -1082130432], [4 x i32] [i32 1009865986, i32 -1105837949, i32 -1310136812, i32 -1082130432], [4 x i32] [i32 1014052363, i32 -1104211806, i32 -1324259335, i32 -1082130432], [4 x i32] [i32 1016948784, i32 -1102592574, i32 820352637, i32 -1082130432], [4 x i32] [i32 1019677780, i32 -1100981229, i32 -1314396938, i32 -1082130432], [4 x i32] [i32 1022722308, i32 -1099378740, i32 823907357, i32 -1082130432], [4 x i32] [i32 1024745356, i32 -1098346861, i32 -1322484322, i32 -1082130432], [4 x i32] [i32 1026580309, i32 -1097555919, i32 -1301456400, i32 -1082130432], [4 x i32] [i32 1028569994, i32 -1096770843, i32 842959264, i32 -1082130432], [4 x i32] [i32 1030713214, i32 -1095992108, i32 841305602, i32 -1082130432], [4 x i32] [i32 1032403730, i32 -1095220182, i32 846224294, i32 -1082130432], [4 x i32] [i32 1033626892, i32 -1094455531, i32 -1311386324, i32 -1082130432], [4 x i32] [i32 1034924748, i32 -1093698614, i32 -1318438045, i32 -1082130432], [4 x i32] [i32 1036296515, i32 -1092949888, i32 -1306651188, i32 -1082130432], [4 x i32] [i32 1037741368, i32 -1092209803, i32 836355956, i32 -1082130432], [4 x i32] [i32 1039258436, i32 -1091478806, i32 838803769, i32 -1082130432], [4 x i32] [i32 1040517098, i32 -1090757337, i32 830532777, i32 -1082130432], [4 x i32] [i32 1041346455, i32 -1090282435, i32 844865538, i32 -1082130432], [4 x i32] [i32 1042210485, i32 -1089931877, i32 851331918, i32 -1082130432], [4 x i32] [i32 1043108667, i32 -1089586726, i32 843723495, i32 -1082130432], [4 x i32] [i32 1044040460, i32 -1089247190, i32 -1295134418, i32 -1082130432], [4 x i32] [i32 1045005303, i32 -1088913472, i32 835167219, i32 -1082130432], [4 x i32] [i32 1046002615, i32 -1088585775, i32 -1299053300, i32 -1082130432], [4 x i32] [i32 1047031795, i32 -1088264295, i32 -1306451013, i32 -1082130432], [4 x i32] [i32 1048092223, i32 -1087949226, i32 839091011, i32 -1082130432], [4 x i32] [i32 1048879630, i32 -1087640758, i32 850866486, i32 -1082130432], [4 x i32] [i32 1049440125, i32 -1087339077, i32 850275634, i32 -1082130432], [4 x i32] [i32 1050015258, i32 -1087044365, i32 -1303386246, i32 -1082130432], [4 x i32] [i32 -1102965013, i32 -1086756798, i32 847314951, i32 -1090519040], [4 x i32] [i32 -1104171737, i32 -1086476551, i32 -1315263508, i32 -1090519040], [4 x i32] [i32 -1105405609, i32 -1086203792, i32 -1296041609, i32 -1090519040], [4 x i32] [i32 -1106665883, i32 -1085938685, i32 -1297002124, i32 -1090519040], [4 x i32] [i32 -1108607350, i32 -1085681390, i32 -1298586048, i32 -1090519040], [4 x i32] [i32 -1111228929, i32 -1085432062, i32 -1300336408, i32 -1090519040], [4 x i32] [i32 -1113898669, i32 -1085190851, i32 -1341370620, i32 -1090519040], [4 x i32] [i32 -1117545059, i32 -1084957903, i32 -1299125734, i32 -1090519040], [4 x i32] [i32 -1123067478, i32 -1084733357, i32 847077312, i32 -1090519040], [4 x i32] [i32 -1134096590, i32 -1084517350, i32 -1306317368, i32 -1090519040], [4 x i32] [i32 1005106760, i32 -1084310011, i32 -1295582893, i32 -1090519040], [4 x i32] [i32 1021989220, i32 -1084111464, i32 854062117, i32 -1090519040], [4 x i32] [i32 1028547674, i32 -1083921831, i32 -1323693830, i32 -1090519040], [4 x i32] [i32 1033133567, i32 -1083741224, i32 851194761, i32 -1090519040], [4 x i32] [i32 1036128472, i32 -1083569753, i32 854270828, i32 -1090519040], [4 x i32] [i32 1039156139, i32 -1083407522, i32 -1292687148, i32 -1090519040], [4 x i32] [i32 1041201069, i32 -1083254626, i32 848507868, i32 -1090519040], [4 x i32] [i32 -1112411313, i32 -1083111160, i32 -1306603299, i32 -1098907648], [4 x i32] [i32 -1115526253, i32 -1082977209, i32 -1295741423, i32 -1098907648], [4 x i32] [i32 -1121648244, i32 -1082852853, i32 848534818, i32 -1098907648], [4 x i32] [i32 -1131878095, i32 -1082738169, i32 -1301477076, i32 -1098907648], [4 x i32] [i32 1004930693, i32 -1082633224, i32 839760357, i32 -1098907648], [4 x i32] [i32 1023221605, i32 -1082538083, i32 -1295626663, i32 -1098907648], [4 x i32] [i32 1029761272, i32 -1082452802, i32 -1291881013, i32 -1098907648], [4 x i32] [i32 -1120124279, i32 -1082377432, i32 842126987, i32 -1107296256], [4 x i32] [i32 -1129184228, i32 -1082312020, i32 821517033, i32 -1107296256], [4 x i32] [i32 992588201, i32 -1082256604, i32 854713859, i32 -1107296256], [4 x i32] [i32 1021119272, i32 -1082211219, i32 -1309390519, i32 -1107296256], [4 x i32] [i32 -1137358811, i32 -1082175891, i32 -1294985084, i32 -1115684864], [4 x i32] [i32 1012667202, i32 -1082150641, i32 -1310827681, i32 -1115684864], [4 x i32] [i32 1004262721, i32 -1082135485, i32 -1333474035, i32 -1124073472], [4 x i32] [i32 0, i32 -1082130432, i32 0, i32 0], [4 x i32] [i32 -1143220927, i32 -1082135485, i32 -1333474035, i32 1023410176], [4 x i32] [i32 -1134816446, i32 -1082150641, i32 -1310827681, i32 1031798784], [4 x i32] [i32 1010124837, i32 -1082175891, i32 -1294985084, i32 1031798784], [4 x i32] [i32 -1126364376, i32 -1082211219, i32 -1309390519, i32 1040187392], [4 x i32] [i32 -1154895447, i32 -1082256604, i32 854713859, i32 1040187392], [4 x i32] [i32 1018299420, i32 -1082312020, i32 821517033, i32 1040187392], [4 x i32] [i32 1027359369, i32 -1082377432, i32 842126987, i32 1040187392], [4 x i32] [i32 -1117722376, i32 -1082452802, i32 -1291881013, i32 1048576000], [4 x i32] [i32 -1124262043, i32 -1082538083, i32 -1295626663, i32 1048576000], [4 x i32] [i32 -1142552955, i32 -1082633224, i32 839760357, i32 1048576000], [4 x i32] [i32 1015605553, i32 -1082738169, i32 -1301477076, i32 1048576000], [4 x i32] [i32 1025835404, i32 -1082852853, i32 848534818, i32 1048576000], [4 x i32] [i32 1031957395, i32 -1082977209, i32 -1295741423, i32 1048576000], [4 x i32] [i32 1035072335, i32 -1083111160, i32 -1306603299, i32 1048576000], [4 x i32] [i32 -1106282579, i32 -1083254626, i32 848507868, i32 1056964608], [4 x i32] [i32 -1108327509, i32 -1083407522, i32 -1292687148, i32 1056964608], [4 x i32] [i32 -1111355176, i32 -1083569753, i32 854270828, i32 1056964608], [4 x i32] [i32 -1114350081, i32 -1083741224, i32 851194761, i32 1056964608], [4 x i32] [i32 -1118935974, i32 -1083921831, i32 -1323693830, i32 1056964608], [4 x i32] [i32 -1125494428, i32 -1084111464, i32 854062117, i32 1056964608], [4 x i32] [i32 -1142376888, i32 -1084310011, i32 -1295582893, i32 1056964608], [4 x i32] [i32 1013387058, i32 -1084517350, i32 -1306317368, i32 1056964608], [4 x i32] [i32 1024416170, i32 -1084733357, i32 847077312, i32 1056964608], [4 x i32] [i32 1029938589, i32 -1084957903, i32 -1299125734, i32 1056964608], [4 x i32] [i32 1033584979, i32 -1085190851, i32 -1341370620, i32 1056964608], [4 x i32] [i32 1036254719, i32 -1085432062, i32 -1300336408, i32 1056964608], [4 x i32] [i32 1038876298, i32 -1085681390, i32 -1298586048, i32 1056964608], [4 x i32] [i32 1040817765, i32 -1085938685, i32 -1297002124, i32 1056964608], [4 x i32] [i32 1042078039, i32 -1086203792, i32 -1296041609, i32 1056964608], [4 x i32] [i32 1043311911, i32 -1086476551, i32 -1315263508, i32 1056964608], [4 x i32] [i32 1044518635, i32 -1086756798, i32 847314951, i32 1056964608], [4 x i32] [i32 -1097468390, i32 -1087044365, i32 -1303386246, i32 1065353216], [4 x i32] [i32 -1098043523, i32 -1087339077, i32 850275634, i32 1065353216], [4 x i32] [i32 -1098604018, i32 -1087640758, i32 850866486, i32 1065353216], [4 x i32] [i32 -1099391425, i32 -1087949226, i32 839091011, i32 1065353216], [4 x i32] [i32 -1100451853, i32 -1088264295, i32 -1306451013, i32 1065353216], [4 x i32] [i32 -1101481033, i32 -1088585775, i32 -1299053300, i32 1065353216], [4 x i32] [i32 -1102478345, i32 -1088913472, i32 835167219, i32 1065353216], [4 x i32] [i32 -1103443188, i32 -1089247190, i32 -1295134418, i32 1065353216], [4 x i32] [i32 -1104374981, i32 -1089586726, i32 843723495, i32 1065353216], [4 x i32] [i32 -1105273163, i32 -1089931877, i32 851331918, i32 1065353216], [4 x i32] [i32 -1106137193, i32 -1090282435, i32 844865538, i32 1065353216], [4 x i32] [i32 -1106966550, i32 -1090757337, i32 830532777, i32 1065353216], [4 x i32] [i32 -1108225212, i32 -1091478806, i32 838803769, i32 1065353216], [4 x i32] [i32 -1109742280, i32 -1092209803, i32 836355956, i32 1065353216], [4 x i32] [i32 -1111187133, i32 -1092949888, i32 -1306651188, i32 1065353216], [4 x i32] [i32 -1112558900, i32 -1093698614, i32 -1318438045, i32 1065353216], [4 x i32] [i32 -1113856756, i32 -1094455531, i32 -1311386324, i32 1065353216], [4 x i32] [i32 -1115079918, i32 -1095220182, i32 846224294, i32 1065353216], [4 x i32] [i32 -1116770434, i32 -1095992108, i32 841305602, i32 1065353216], [4 x i32] [i32 -1118913654, i32 -1096770843, i32 842959264, i32 1065353216], [4 x i32] [i32 -1120903339, i32 -1097555919, i32 -1301456400, i32 1065353216], [4 x i32] [i32 -1122738292, i32 -1098346861, i32 -1322484322, i32 1065353216], [4 x i32] [i32 -1124761340, i32 -1099378740, i32 823907357, i32 1065353216], [4 x i32] [i32 -1127805868, i32 -1100981229, i32 -1314396938, i32 1065353216], [4 x i32] [i32 -1130534864, i32 -1102592574, i32 820352637, i32 1065353216], [4 x i32] [i32 -1133431285, i32 -1104211806, i32 -1324259335, i32 1065353216], [4 x i32] [i32 -1137617662, i32 -1105837949, i32 -1310136812, i32 1065353216], [4 x i32] [i32 -1141477828, i32 -1107643789, i32 823486671, i32 1065353216], [4 x i32] [i32 -1147287183, i32 -1110917834, i32 813011701, i32 1065353216], [4 x i32] [i32 -1154379112, i32 -1114199803, i32 827530849, i32 1065353216], [4 x i32] [i32 -1164058168, i32 -1119290576, i32 820978303, i32 1065353216], [4 x i32] [i32 -1180833825, i32 -1127675216, i32 805685656, i32 1065353216]], i32 2147483647, i32 1176256512, i32 2139095040, i32 -1104500053, i32 1007192156, i32 -1090519040, i32 1026206332, i32 1078525952, i32 981311488, i32 874651648, i32 750018842, i32 -1104500058, i32 1007191914, i32 -1185957889, i32 909041400, i32 1050868099, i32 1262485504 }, align 4
@__ocl_svml_trig_reduction_data = addrspace(2) constant %struct.sReduction_Table_Type { [256 x [3 x i32]] [[3 x i32] zeroinitializer, [3 x i32] zeroinitializer, [3 x i32] zeroinitializer, [3 x i32] zeroinitializer, [3 x i32] zeroinitializer, [3 x i32] zeroinitializer, [3 x i32] zeroinitializer, [3 x i32] zeroinitializer, [3 x i32] zeroinitializer, [3 x i32] zeroinitializer, [3 x i32] zeroinitializer, [3 x i32] zeroinitializer, [3 x i32] zeroinitializer, [3 x i32] zeroinitializer, [3 x i32] zeroinitializer, [3 x i32] zeroinitializer, [3 x i32] zeroinitializer, [3 x i32] zeroinitializer, [3 x i32] zeroinitializer, [3 x i32] zeroinitializer, [3 x i32] zeroinitializer, [3 x i32] zeroinitializer, [3 x i32] zeroinitializer, [3 x i32] zeroinitializer, [3 x i32] zeroinitializer, [3 x i32] zeroinitializer, [3 x i32] zeroinitializer, [3 x i32] zeroinitializer, [3 x i32] zeroinitializer, [3 x i32] zeroinitializer, [3 x i32] zeroinitializer, [3 x i32] zeroinitializer, [3 x i32] zeroinitializer, [3 x i32] zeroinitializer, [3 x i32] zeroinitializer, [3 x i32] zeroinitializer, [3 x i32] zeroinitializer, [3 x i32] zeroinitializer, [3 x i32] zeroinitializer, [3 x i32] zeroinitializer, [3 x i32] zeroinitializer, [3 x i32] zeroinitializer, [3 x i32] zeroinitializer, [3 x i32] zeroinitializer, [3 x i32] zeroinitializer, [3 x i32] zeroinitializer, [3 x i32] zeroinitializer, [3 x i32] zeroinitializer, [3 x i32] zeroinitializer, [3 x i32] zeroinitializer, [3 x i32] zeroinitializer, [3 x i32] zeroinitializer, [3 x i32] zeroinitializer, [3 x i32] zeroinitializer, [3 x i32] zeroinitializer, [3 x i32] zeroinitializer, [3 x i32] zeroinitializer, [3 x i32] [i32 0, i32 0, i32 1], [3 x i32] [i32 0, i32 0, i32 2], [3 x i32] [i32 0, i32 0, i32 5], [3 x i32] [i32 0, i32 0, i32 10], [3 x i32] [i32 0, i32 0, i32 20], [3 x i32] [i32 0, i32 0, i32 40], [3 x i32] [i32 0, i32 0, i32 81], [3 x i32] [i32 0, i32 0, i32 162], [3 x i32] [i32 0, i32 0, i32 325], [3 x i32] [i32 0, i32 0, i32 651], [3 x i32] [i32 0, i32 0, i32 1303], [3 x i32] [i32 0, i32 0, i32 2607], [3 x i32] [i32 0, i32 0, i32 5215], [3 x i32] [i32 0, i32 0, i32 10430], [3 x i32] [i32 0, i32 0, i32 20860], [3 x i32] [i32 0, i32 0, i32 41721], [3 x i32] [i32 0, i32 0, i32 83443], [3 x i32] [i32 0, i32 0, i32 166886], [3 x i32] [i32 0, i32 0, i32 333772], [3 x i32] [i32 0, i32 0, i32 667544], [3 x i32] [i32 0, i32 0, i32 1335088], [3 x i32] [i32 0, i32 0, i32 2670176], [3 x i32] [i32 0, i32 0, i32 5340353], [3 x i32] [i32 0, i32 0, i32 10680707], [3 x i32] [i32 0, i32 0, i32 21361414], [3 x i32] [i32 0, i32 0, i32 42722829], [3 x i32] [i32 0, i32 0, i32 85445659], [3 x i32] [i32 0, i32 0, i32 170891318], [3 x i32] [i32 0, i32 0, i32 341782637], [3 x i32] [i32 0, i32 0, i32 683565275], [3 x i32] [i32 0, i32 0, i32 1367130551], [3 x i32] [i32 0, i32 0, i32 -1560706194], [3 x i32] [i32 0, i32 1, i32 1173554908], [3 x i32] [i32 0, i32 2, i32 -1947857479], [3 x i32] [i32 0, i32 5, i32 399252338], [3 x i32] [i32 0, i32 10, i32 798504676], [3 x i32] [i32 0, i32 20, i32 1597009353], [3 x i32] [i32 0, i32 40, i32 -1100948589], [3 x i32] [i32 0, i32 81, i32 2093070119], [3 x i32] [i32 0, i32 162, i32 -108827058], [3 x i32] [i32 0, i32 325, i32 -217654116], [3 x i32] [i32 0, i32 651, i32 -435308231], [3 x i32] [i32 0, i32 1303, i32 -870616462], [3 x i32] [i32 0, i32 2607, i32 -1741232924], [3 x i32] [i32 0, i32 5215, i32 812501448], [3 x i32] [i32 0, i32 10430, i32 1625002897], [3 x i32] [i32 0, i32 20860, i32 -1044961502], [3 x i32] [i32 0, i32 41721, i32 -2089923004], [3 x i32] [i32 0, i32 83443, i32 115121288], [3 x i32] [i32 0, i32 166886, i32 230242576], [3 x i32] [i32 0, i32 333772, i32 460485152], [3 x i32] [i32 0, i32 667544, i32 920970305], [3 x i32] [i32 0, i32 1335088, i32 1841940610], [3 x i32] [i32 0, i32 2670176, i32 -611086075], [3 x i32] [i32 0, i32 5340353, i32 -1222172150], [3 x i32] [i32 0, i32 10680707, i32 1850622997], [3 x i32] [i32 0, i32 21361414, i32 -593721302], [3 x i32] [i32 0, i32 42722829, i32 -1187442604], [3 x i32] [i32 0, i32 85445659, i32 1920082089], [3 x i32] [i32 0, i32 170891318, i32 -454803118], [3 x i32] [i32 0, i32 341782637, i32 -909606235], [3 x i32] [i32 0, i32 683565275, i32 -1819212470], [3 x i32] [i32 0, i32 1367130551, i32 656542356], [3 x i32] [i32 0, i32 -1560706194, i32 1313084713], [3 x i32] [i32 1, i32 1173554908, i32 -1668797869], [3 x i32] [i32 2, i32 -1947857479, i32 957371559], [3 x i32] [i32 5, i32 399252338, i32 1914743119], [3 x i32] [i32 10, i32 798504676, i32 -465481057], [3 x i32] [i32 20, i32 1597009353, i32 -930962113], [3 x i32] [i32 40, i32 -1100948589, i32 -1861924225], [3 x i32] [i32 81, i32 2093070119, i32 571118846], [3 x i32] [i32 162, i32 -108827058, i32 1142237692], [3 x i32] [i32 325, i32 -217654116, i32 -2010491912], [3 x i32] [i32 651, i32 -435308231, i32 273983472], [3 x i32] [i32 1303, i32 -870616462, i32 547966945], [3 x i32] [i32 2607, i32 -1741232924, i32 1095933890], [3 x i32] [i32 5215, i32 812501448, i32 -2103099516], [3 x i32] [i32 10430, i32 1625002897, i32 88768265], [3 x i32] [i32 20860, i32 -1044961502, i32 177536531], [3 x i32] [i32 41721, i32 -2089923004, i32 355073063], [3 x i32] [i32 83443, i32 115121288, i32 710146126], [3 x i32] [i32 166886, i32 230242576, i32 1420292253], [3 x i32] [i32 333772, i32 460485152, i32 -1454382790], [3 x i32] [i32 667544, i32 920970305, i32 1386201717], [3 x i32] [i32 1335088, i32 1841940610, i32 -1522563862], [3 x i32] [i32 2670176, i32 -611086075, i32 1249839573], [3 x i32] [i32 5340353, i32 -1222172150, i32 -1795288149], [3 x i32] [i32 10680707, i32 1850622997, i32 704390999], [3 x i32] [i32 21361414, i32 -593721302, i32 1408781999], [3 x i32] [i32 42722829, i32 -1187442604, i32 -1477403297], [3 x i32] [i32 85445659, i32 1920082089, i32 1340160702], [3 x i32] [i32 170891318, i32 -454803118, i32 -1614645891], [3 x i32] [i32 341782637, i32 -909606235, i32 1065675514], [3 x i32] [i32 683565275, i32 -1819212470, i32 2131351028], [3 x i32] [i32 1367130551, i32 656542356, i32 -32265240], [3 x i32] [i32 -1560706194, i32 1313084713, i32 -64530479], [3 x i32] [i32 1173554908, i32 -1668797869, i32 -129060957], [3 x i32] [i32 -1947857479, i32 957371559, i32 -258121913], [3 x i32] [i32 399252338, i32 1914743119, i32 -516243825], [3 x i32] [i32 798504676, i32 -465481057, i32 -1032487649], [3 x i32] [i32 1597009353, i32 -930962113, i32 -2064975298], [3 x i32] [i32 -1100948589, i32 -1861924225, i32 165016701], [3 x i32] [i32 2093070119, i32 571118846, i32 330033402], [3 x i32] [i32 -108827058, i32 1142237692, i32 660066805], [3 x i32] [i32 -217654116, i32 -2010491912, i32 1320133610], [3 x i32] [i32 -435308231, i32 273983472, i32 -1654700076], [3 x i32] [i32 -870616462, i32 547966945, i32 985567145], [3 x i32] [i32 -1741232924, i32 1095933890, i32 1971134291], [3 x i32] [i32 812501448, i32 -2103099516, i32 -352698714], [3 x i32] [i32 1625002897, i32 88768265, i32 -705397427], [3 x i32] [i32 -1044961502, i32 177536531, i32 -1410794854], [3 x i32] [i32 -2089923004, i32 355073063, i32 1473377588], [3 x i32] [i32 115121288, i32 710146126, i32 -1348212119], [3 x i32] [i32 230242576, i32 1420292253, i32 1598543059], [3 x i32] [i32 460485152, i32 -1454382790, i32 -1097881178], [3 x i32] [i32 920970305, i32 1386201717, i32 2099204941], [3 x i32] [i32 1841940610, i32 -1522563862, i32 -96557413], [3 x i32] [i32 -611086075, i32 1249839573, i32 -193114825], [3 x i32] [i32 -1222172150, i32 -1795288149, i32 -386229650], [3 x i32] [i32 1850622997, i32 704390999, i32 -772459299], [3 x i32] [i32 -593721302, i32 1408781999, i32 -1544918597], [3 x i32] [i32 -1187442604, i32 -1477403297, i32 1205130103], [3 x i32] [i32 1920082089, i32 1340160702, i32 -1884707090], [3 x i32] [i32 -454803118, i32 -1614645891, i32 525553116], [3 x i32] [i32 -909606235, i32 1065675514, i32 1051106232], [3 x i32] [i32 -1819212470, i32 2131351028, i32 2102212464], [3 x i32] [i32 656542356, i32 -32265240, i32 -90542368], [3 x i32] [i32 1313084713, i32 -64530479, i32 -181084736], [3 x i32] [i32 -1668797869, i32 -129060957, i32 -362169471], [3 x i32] [i32 957371559, i32 -258121913, i32 -724338941], [3 x i32] [i32 1914743119, i32 -516243825, i32 -1448677882], [3 x i32] [i32 -465481057, i32 -1032487649, i32 1397611533], [3 x i32] [i32 -930962113, i32 -2064975298, i32 -1499744229], [3 x i32] [i32 -1861924225, i32 165016701, i32 1295478838], [3 x i32] [i32 571118846, i32 330033402, i32 -1704009619], [3 x i32] [i32 1142237692, i32 660066805, i32 886948059], [3 x i32] [i32 -2010491912, i32 1320133610, i32 1773896118], [3 x i32] [i32 273983472, i32 -1654700076, i32 -747175059], [3 x i32] [i32 547966945, i32 985567145, i32 -1494350117], [3 x i32] [i32 1095933890, i32 1971134291, i32 1306267062], [3 x i32] [i32 -2103099516, i32 -352698714, i32 -1682433172], [3 x i32] [i32 88768265, i32 -705397427, i32 930100952], [3 x i32] [i32 177536531, i32 -1410794854, i32 1860201905], [3 x i32] [i32 355073063, i32 1473377588, i32 -574563486], [3 x i32] [i32 710146126, i32 -1348212119, i32 -1149126971], [3 x i32] [i32 1420292253, i32 1598543059, i32 1996713354], [3 x i32] [i32 -1454382790, i32 -1097881178, i32 -301540588], [3 x i32] [i32 1386201717, i32 2099204941, i32 -603081175], [3 x i32] [i32 -1522563862, i32 -96557413, i32 -1206162350], [3 x i32] [i32 1249839573, i32 -193114825, i32 1882642597], [3 x i32] [i32 -1795288149, i32 -386229650, i32 -529682102], [3 x i32] [i32 704390999, i32 -772459299, i32 -1059364203], [3 x i32] [i32 1408781999, i32 -1544918597, i32 -2118728405], [3 x i32] [i32 -1477403297, i32 1205130103, i32 57510486], [3 x i32] [i32 1340160702, i32 -1884707090, i32 115020972], [3 x i32] [i32 -1614645891, i32 525553116, i32 230041945], [3 x i32] [i32 1065675514, i32 1051106232, i32 460083891], [3 x i32] [i32 2131351028, i32 2102212464, i32 920167782], [3 x i32] [i32 -32265240, i32 -90542368, i32 1840335564], [3 x i32] [i32 -64530479, i32 -181084736, i32 -614296167], [3 x i32] [i32 -129060957, i32 -362169471, i32 -1228592334], [3 x i32] [i32 -258121913, i32 -724338941, i32 1837782628], [3 x i32] [i32 -516243825, i32 -1448677882, i32 -619402039], [3 x i32] [i32 -1032487649, i32 1397611533, i32 -1238804077], [3 x i32] [i32 -2064975298, i32 -1499744229, i32 1817359143], [3 x i32] [i32 165016701, i32 1295478838, i32 -660249009], [3 x i32] [i32 330033402, i32 -1704009619, i32 -1320498018], [3 x i32] [i32 660066805, i32 886948059, i32 1653971260], [3 x i32] [i32 1320133610, i32 1773896118, i32 -987024776], [3 x i32] [i32 -1654700076, i32 -747175059, i32 -1974049551], [3 x i32] [i32 985567145, i32 -1494350117, i32 346868194], [3 x i32] [i32 1971134291, i32 1306267062, i32 693736388], [3 x i32] [i32 -352698714, i32 -1682433172, i32 1387472776], [3 x i32] [i32 -705397427, i32 930100952, i32 -1520021744], [3 x i32] [i32 -1410794854, i32 1860201905, i32 1254923809], [3 x i32] [i32 1473377588, i32 -574563486, i32 -1785119677], [3 x i32] [i32 -1348212119, i32 -1149126971, i32 724727943], [3 x i32] [i32 1598543059, i32 1996713354, i32 1449455886], [3 x i32] [i32 -1097881178, i32 -301540588, i32 -1396055524], [3 x i32] [i32 2099204941, i32 -603081175, i32 1502856249], [3 x i32] [i32 -96557413, i32 -1206162350, i32 -1289254798], [3 x i32] [i32 -193114825, i32 1882642597, i32 1716457700], [3 x i32] [i32 -386229650, i32 -529682102, i32 -862051896], [3 x i32] [i32 -772459299, i32 -1059364203, i32 -1724103792], [3 x i32] [i32 -1544918597, i32 -2118728405, i32 846759712], [3 x i32] [i32 1205130103, i32 57510486, i32 1693519425], [3 x i32] [i32 -1884707090, i32 115020972, i32 -907928446], [3 x i32] [i32 525553116, i32 230041945, i32 -1815856892], [3 x i32] [i32 1051106232, i32 460083891, i32 663253512], [3 x i32] [i32 2102212464, i32 920167782, i32 1326507024], [3 x i32] [i32 -90542368, i32 1840335564, i32 -1641953248], [3 x i32] [i32 -181084736, i32 -614296167, i32 1011060801], [3 x i32] [i32 -362169471, i32 -1228592334, i32 2022121603], [3 x i32] [i32 -724338941, i32 1837782628, i32 -250724089], [3 x i32] [i32 -1448677882, i32 -619402039, i32 -501448177], [3 x i32] [i32 1397611533, i32 -1238804077, i32 -1002896353], [3 x i32] [i32 -1499744229, i32 1817359143, i32 -2005792705], [3 x i32] [i32 1295478838, i32 -660249009, i32 283381887], [3 x i32] [i32 -1704009619, i32 -1320498018, i32 566763775]] }, align 4
@__bif_flag_FastRelaxedMath = addrspace(2) constant i32 0

; Function Attrs: alwaysinline nounwind
define void @resetFaceNormals(<4 x float> addrspace(1)* %faceNormals, <8 x i32> %r0, <8 x i32> %payloadHeader, i16 %localIdX, i16 %localIdY, i16 %localIdZ, i8 addrspace(2)* %constBase) #0 {
  %scalar = extractelement <8 x i32> %payloadHeader, i32 0
  %groupId = extractelement <8 x i32> %r0, i32 1
  %localSize = extractelement <8 x i32> %payloadHeader, i32 3
  %1 = mul i32 %localSize, %groupId
  %2 = zext i16 %localIdX to i32
  %3 = add i32 %1, %2
  %4 = add i32 %3, %scalar
  %5 = ptrtoint <4 x float> addrspace(1)* %faceNormals to i32
  %6 = shl i32 %4, 4
  %7 = add i32 %5, %6
  %8 = inttoptr i32 %7 to <4 x float> addrspace(1)*
  %9 = insertelement <4 x float> undef, float 0.000000e+00, i32 0
  %10 = insertelement <4 x float> %9, float 0.000000e+00, i32 1
  %11 = insertelement <4 x float> %10, float 0.000000e+00, i32 2
  %12 = insertelement <4 x float> %11, float 0.000000e+00, i32 3
  store <4 x float> %12, <4 x float> addrspace(1)* %8, align 16, !tbaa !77
  ret void
}

; Function Attrs: alwaysinline nounwind
define void @calculateFaceNormals(i32 addrspace(1)* %indexes, <4 x float> addrspace(1)* %positions, <4 x float> addrspace(1)* %faceNormals, <8 x i32> %r0, <8 x i32> %payloadHeader, i16 %localIdX, i16 %localIdY, i16 %localIdZ, i8 addrspace(2)* %constBase) #0 {
  %scalar = extractelement <8 x i32> %payloadHeader, i32 0
  %groupId = extractelement <8 x i32> %r0, i32 1
  %localSize = extractelement <8 x i32> %payloadHeader, i32 3
  %1 = mul i32 %localSize, %groupId
  %2 = zext i16 %localIdX to i32
  %3 = add i32 %1, %2
  %4 = add i32 %3, %scalar
  %5 = mul i32 %4, 3
  %6 = getelementptr inbounds i32, i32 addrspace(1)* %indexes, i32 %5
  %7 = load i32, i32 addrspace(1)* %6, align 4, !tbaa !79
  %8 = add i32 %5, 1
  %9 = getelementptr inbounds i32, i32 addrspace(1)* %indexes, i32 %8
  %10 = load i32, i32 addrspace(1)* %9, align 4, !tbaa !79
  %11 = add i32 %5, 2
  %12 = getelementptr inbounds i32, i32 addrspace(1)* %indexes, i32 %11
  %13 = load i32, i32 addrspace(1)* %12, align 4, !tbaa !79
  %14 = getelementptr inbounds <4 x float>, <4 x float> addrspace(1)* %positions, i32 %7
  %15 = load <4 x float>, <4 x float> addrspace(1)* %14, align 16, !tbaa !77
  %scalar12 = extractelement <4 x float> %15, i32 0
  %scalar13 = extractelement <4 x float> %15, i32 1
  %scalar14 = extractelement <4 x float> %15, i32 2
  %16 = getelementptr inbounds <4 x float>, <4 x float> addrspace(1)* %positions, i32 %10
  %17 = load <4 x float>, <4 x float> addrspace(1)* %16, align 16, !tbaa !77
  %scalar16 = extractelement <4 x float> %17, i32 0
  %scalar17 = extractelement <4 x float> %17, i32 1
  %scalar18 = extractelement <4 x float> %17, i32 2
  %18 = getelementptr inbounds <4 x float>, <4 x float> addrspace(1)* %positions, i32 %13
  %19 = load <4 x float>, <4 x float> addrspace(1)* %18, align 16, !tbaa !77
  %scalar8 = extractelement <4 x float> %19, i32 0
  %scalar9 = extractelement <4 x float> %19, i32 1
  %scalar10 = extractelement <4 x float> %19, i32 2
  %20 = fsub float %scalar8, %scalar12
  %21 = fsub float %scalar9, %scalar13
  %22 = fsub float %scalar10, %scalar14
  %23 = fsub float %scalar16, %scalar12
  %24 = fsub float %scalar17, %scalar13
  %25 = fsub float %scalar18, %scalar14
  %26 = fmul float %21, %25
  %27 = fmul float %22, %24
  %28 = fmul float %20, %25
  %29 = fmul float %22, %23
  %30 = fmul float %20, %24
  %31 = fmul float %21, %23
  %32 = fsub float %26, %27
  %33 = fsub float %29, %28
  %34 = fsub float %30, %31
  %35 = fmul float %34, %34
  %36 = fadd float %35, 0.000000e+00
  %37 = fmul float %33, %33
  %38 = fadd float %37, %36
  %39 = fmul float %32, %32
  %40 = fadd float %39, %38
  %41 = call float @genx.GenISA.sqrt.f32(float %40)
  %42 = fdiv float 1.000000e+00, %41, !fpmath !80
  %43 = fmul float %42, %32
  %44 = fmul float %42, %33
  %45 = fmul float %42, %34
  %46 = fcmp oeq float %32, 0.000000e+00
  %47 = fcmp oeq float %33, 0.000000e+00
  %48 = fcmp oeq float %34, 0.000000e+00
  %49 = sext i1 %46 to i32
  %50 = sext i1 %47 to i32
  %51 = sext i1 %48 to i32
  %52 = call i32 @llvm.ctlz.i32(i32 %49, i1 false)
  %53 = icmp eq i32 %52, 0
  %.sink.i.i20 = select i1 %53, float %32, float %43
  %54 = call i32 @llvm.ctlz.i32(i32 %50, i1 false)
  %55 = icmp eq i32 %54, 0
  %.sink1.i.i25 = select i1 %55, float %33, float %44
  %56 = call i32 @llvm.ctlz.i32(i32 %51, i1 false)
  %57 = icmp eq i32 %56, 0
  %.sink2.i.i30 = select i1 %57, float %34, float %45
  %assembled.vect = insertelement <4 x float> undef, float %.sink.i.i20, i32 0
  %assembled.vect36 = insertelement <4 x float> %assembled.vect, float %.sink1.i.i25, i32 1
  %assembled.vect37 = insertelement <4 x float> %assembled.vect36, float %.sink2.i.i30, i32 2
  %assembled.vect38 = insertelement <4 x float> %assembled.vect37, float 0.000000e+00, i32 3
  %58 = getelementptr inbounds <4 x float>, <4 x float> addrspace(1)* %faceNormals, i32 %4
  store <4 x float> %assembled.vect38, <4 x float> addrspace(1)* %58, align 16, !tbaa !77
  ret void
}

; Function Attrs: alwaysinline nounwind
define void @averageFaceNormals(float addrspace(1)* %vbo, <4 x float> addrspace(1)* %faceNormals, i32 addrspace(1)* %faceIndexes, <8 x i32> %r0, <8 x i32> %payloadHeader, i16 %localIdX, i16 %localIdY, i16 %localIdZ, i8 addrspace(2)* %constBase) #0 {
  %scalar = extractelement <8 x i32> %payloadHeader, i32 0
  %groupId = extractelement <8 x i32> %r0, i32 1
  %localSize = extractelement <8 x i32> %payloadHeader, i32 3
  %1 = mul i32 %localSize, %groupId
  %2 = zext i16 %localIdX to i32
  %3 = add i32 %1, %2
  %4 = add i32 %3, %scalar
  %5 = shl i32 %4, 3
  %6 = getelementptr inbounds i32, i32 addrspace(1)* %faceIndexes, i32 %5
  %7 = load i32, i32 addrspace(1)* %6, align 4, !tbaa !79
  %8 = icmp eq i32 %7, -1
  br i1 %8, label %.._crit_edge_crit_edge, label %9

.._crit_edge_crit_edge:                           ; preds = %0
  br label %._crit_edge

; <label>:9                                       ; preds = %0
  %10 = getelementptr inbounds <4 x float>, <4 x float> addrspace(1)* %faceNormals, i32 %7
  %11 = load <4 x float>, <4 x float> addrspace(1)* %10, align 16, !tbaa !77
  %scalar12 = extractelement <4 x float> %11, i32 0
  %scalar13 = extractelement <4 x float> %11, i32 1
  %scalar14 = extractelement <4 x float> %11, i32 2
  %scalar15 = extractelement <4 x float> %11, i32 3
  %12 = fadd float %scalar12, 0.000000e+00
  %13 = fadd float %scalar13, 0.000000e+00
  %14 = fadd float %scalar14, 0.000000e+00
  %15 = fadd float %scalar15, 0.000000e+00
  br label %._crit_edge

._crit_edge:                                      ; preds = %.._crit_edge_crit_edge, %9
  %normal.116 = phi float [ %12, %9 ], [ 0.000000e+00, %.._crit_edge_crit_edge ]
  %normal.117 = phi float [ %13, %9 ], [ 0.000000e+00, %.._crit_edge_crit_edge ]
  %normal.118 = phi float [ %14, %9 ], [ 0.000000e+00, %.._crit_edge_crit_edge ]
  %normal.119 = phi float [ %15, %9 ], [ 0.000000e+00, %.._crit_edge_crit_edge ]
  %16 = or i32 %5, 1
  %17 = getelementptr inbounds i32, i32 addrspace(1)* %faceIndexes, i32 %16
  %18 = load i32, i32 addrspace(1)* %17, align 4, !tbaa !79
  %19 = icmp eq i32 %18, -1
  br i1 %19, label %._crit_edge.._crit_edge.1_crit_edge, label %20

._crit_edge.._crit_edge.1_crit_edge:              ; preds = %._crit_edge
  br label %._crit_edge.1

; <label>:20                                      ; preds = %._crit_edge
  %21 = getelementptr inbounds <4 x float>, <4 x float> addrspace(1)* %faceNormals, i32 %18
  %22 = load <4 x float>, <4 x float> addrspace(1)* %21, align 16, !tbaa !77
  %scalar12.1 = extractelement <4 x float> %22, i32 0
  %scalar13.1 = extractelement <4 x float> %22, i32 1
  %scalar14.1 = extractelement <4 x float> %22, i32 2
  %scalar15.1 = extractelement <4 x float> %22, i32 3
  %23 = fadd float %normal.116, %scalar12.1
  %24 = fadd float %normal.117, %scalar13.1
  %25 = fadd float %normal.118, %scalar14.1
  %26 = fadd float %normal.119, %scalar15.1
  br label %._crit_edge.1

._crit_edge.1:                                    ; preds = %._crit_edge.._crit_edge.1_crit_edge, %20
  %normal.116.1 = phi float [ %23, %20 ], [ %normal.116, %._crit_edge.._crit_edge.1_crit_edge ]
  %normal.117.1 = phi float [ %24, %20 ], [ %normal.117, %._crit_edge.._crit_edge.1_crit_edge ]
  %normal.118.1 = phi float [ %25, %20 ], [ %normal.118, %._crit_edge.._crit_edge.1_crit_edge ]
  %normal.119.1 = phi float [ %26, %20 ], [ %normal.119, %._crit_edge.._crit_edge.1_crit_edge ]
  %27 = or i32 %5, 2
  %28 = getelementptr inbounds i32, i32 addrspace(1)* %faceIndexes, i32 %27
  %29 = load i32, i32 addrspace(1)* %28, align 4, !tbaa !79
  %30 = icmp eq i32 %29, -1
  br i1 %30, label %._crit_edge.1.._crit_edge.2_crit_edge, label %31

._crit_edge.1.._crit_edge.2_crit_edge:            ; preds = %._crit_edge.1
  br label %._crit_edge.2

; <label>:31                                      ; preds = %._crit_edge.1
  %32 = getelementptr inbounds <4 x float>, <4 x float> addrspace(1)* %faceNormals, i32 %29
  %33 = load <4 x float>, <4 x float> addrspace(1)* %32, align 16, !tbaa !77
  %scalar12.2 = extractelement <4 x float> %33, i32 0
  %scalar13.2 = extractelement <4 x float> %33, i32 1
  %scalar14.2 = extractelement <4 x float> %33, i32 2
  %scalar15.2 = extractelement <4 x float> %33, i32 3
  %34 = fadd float %normal.116.1, %scalar12.2
  %35 = fadd float %normal.117.1, %scalar13.2
  %36 = fadd float %normal.118.1, %scalar14.2
  %37 = fadd float %normal.119.1, %scalar15.2
  br label %._crit_edge.2

._crit_edge.2:                                    ; preds = %._crit_edge.1.._crit_edge.2_crit_edge, %31
  %normal.116.2 = phi float [ %34, %31 ], [ %normal.116.1, %._crit_edge.1.._crit_edge.2_crit_edge ]
  %normal.117.2 = phi float [ %35, %31 ], [ %normal.117.1, %._crit_edge.1.._crit_edge.2_crit_edge ]
  %normal.118.2 = phi float [ %36, %31 ], [ %normal.118.1, %._crit_edge.1.._crit_edge.2_crit_edge ]
  %normal.119.2 = phi float [ %37, %31 ], [ %normal.119.1, %._crit_edge.1.._crit_edge.2_crit_edge ]
  %38 = or i32 %5, 3
  %39 = getelementptr inbounds i32, i32 addrspace(1)* %faceIndexes, i32 %38
  %40 = load i32, i32 addrspace(1)* %39, align 4, !tbaa !79
  %41 = icmp eq i32 %40, -1
  br i1 %41, label %._crit_edge.2.._crit_edge.3_crit_edge, label %42

._crit_edge.2.._crit_edge.3_crit_edge:            ; preds = %._crit_edge.2
  br label %._crit_edge.3

; <label>:42                                      ; preds = %._crit_edge.2
  %43 = getelementptr inbounds <4 x float>, <4 x float> addrspace(1)* %faceNormals, i32 %40
  %44 = load <4 x float>, <4 x float> addrspace(1)* %43, align 16, !tbaa !77
  %scalar12.3 = extractelement <4 x float> %44, i32 0
  %scalar13.3 = extractelement <4 x float> %44, i32 1
  %scalar14.3 = extractelement <4 x float> %44, i32 2
  %scalar15.3 = extractelement <4 x float> %44, i32 3
  %45 = fadd float %normal.116.2, %scalar12.3
  %46 = fadd float %normal.117.2, %scalar13.3
  %47 = fadd float %normal.118.2, %scalar14.3
  %48 = fadd float %normal.119.2, %scalar15.3
  br label %._crit_edge.3

._crit_edge.3:                                    ; preds = %._crit_edge.2.._crit_edge.3_crit_edge, %42
  %normal.116.3 = phi float [ %45, %42 ], [ %normal.116.2, %._crit_edge.2.._crit_edge.3_crit_edge ]
  %normal.117.3 = phi float [ %46, %42 ], [ %normal.117.2, %._crit_edge.2.._crit_edge.3_crit_edge ]
  %normal.118.3 = phi float [ %47, %42 ], [ %normal.118.2, %._crit_edge.2.._crit_edge.3_crit_edge ]
  %normal.119.3 = phi float [ %48, %42 ], [ %normal.119.2, %._crit_edge.2.._crit_edge.3_crit_edge ]
  %49 = or i32 %5, 4
  %50 = getelementptr inbounds i32, i32 addrspace(1)* %faceIndexes, i32 %49
  %51 = load i32, i32 addrspace(1)* %50, align 4, !tbaa !79
  %52 = icmp eq i32 %51, -1
  br i1 %52, label %._crit_edge.3.._crit_edge.4_crit_edge, label %53

._crit_edge.3.._crit_edge.4_crit_edge:            ; preds = %._crit_edge.3
  br label %._crit_edge.4

; <label>:53                                      ; preds = %._crit_edge.3
  %54 = getelementptr inbounds <4 x float>, <4 x float> addrspace(1)* %faceNormals, i32 %51
  %55 = load <4 x float>, <4 x float> addrspace(1)* %54, align 16, !tbaa !77
  %scalar12.4 = extractelement <4 x float> %55, i32 0
  %scalar13.4 = extractelement <4 x float> %55, i32 1
  %scalar14.4 = extractelement <4 x float> %55, i32 2
  %scalar15.4 = extractelement <4 x float> %55, i32 3
  %56 = fadd float %normal.116.3, %scalar12.4
  %57 = fadd float %normal.117.3, %scalar13.4
  %58 = fadd float %normal.118.3, %scalar14.4
  %59 = fadd float %normal.119.3, %scalar15.4
  br label %._crit_edge.4

._crit_edge.4:                                    ; preds = %._crit_edge.3.._crit_edge.4_crit_edge, %53
  %normal.116.4 = phi float [ %56, %53 ], [ %normal.116.3, %._crit_edge.3.._crit_edge.4_crit_edge ]
  %normal.117.4 = phi float [ %57, %53 ], [ %normal.117.3, %._crit_edge.3.._crit_edge.4_crit_edge ]
  %normal.118.4 = phi float [ %58, %53 ], [ %normal.118.3, %._crit_edge.3.._crit_edge.4_crit_edge ]
  %normal.119.4 = phi float [ %59, %53 ], [ %normal.119.3, %._crit_edge.3.._crit_edge.4_crit_edge ]
  %60 = or i32 %5, 5
  %61 = getelementptr inbounds i32, i32 addrspace(1)* %faceIndexes, i32 %60
  %62 = load i32, i32 addrspace(1)* %61, align 4, !tbaa !79
  %63 = icmp eq i32 %62, -1
  br i1 %63, label %._crit_edge.4.._crit_edge.5_crit_edge, label %64

._crit_edge.4.._crit_edge.5_crit_edge:            ; preds = %._crit_edge.4
  br label %._crit_edge.5

; <label>:64                                      ; preds = %._crit_edge.4
  %65 = getelementptr inbounds <4 x float>, <4 x float> addrspace(1)* %faceNormals, i32 %62
  %66 = load <4 x float>, <4 x float> addrspace(1)* %65, align 16, !tbaa !77
  %scalar12.5 = extractelement <4 x float> %66, i32 0
  %scalar13.5 = extractelement <4 x float> %66, i32 1
  %scalar14.5 = extractelement <4 x float> %66, i32 2
  %scalar15.5 = extractelement <4 x float> %66, i32 3
  %67 = fadd float %normal.116.4, %scalar12.5
  %68 = fadd float %normal.117.4, %scalar13.5
  %69 = fadd float %normal.118.4, %scalar14.5
  %70 = fadd float %normal.119.4, %scalar15.5
  br label %._crit_edge.5

._crit_edge.5:                                    ; preds = %._crit_edge.4.._crit_edge.5_crit_edge, %64
  %normal.116.5 = phi float [ %67, %64 ], [ %normal.116.4, %._crit_edge.4.._crit_edge.5_crit_edge ]
  %normal.117.5 = phi float [ %68, %64 ], [ %normal.117.4, %._crit_edge.4.._crit_edge.5_crit_edge ]
  %normal.118.5 = phi float [ %69, %64 ], [ %normal.118.4, %._crit_edge.4.._crit_edge.5_crit_edge ]
  %normal.119.5 = phi float [ %70, %64 ], [ %normal.119.4, %._crit_edge.4.._crit_edge.5_crit_edge ]
  %71 = or i32 %5, 6
  %72 = getelementptr inbounds i32, i32 addrspace(1)* %faceIndexes, i32 %71
  %73 = load i32, i32 addrspace(1)* %72, align 4, !tbaa !79
  %74 = icmp eq i32 %73, -1
  br i1 %74, label %._crit_edge.5.._crit_edge.6_crit_edge, label %75

._crit_edge.5.._crit_edge.6_crit_edge:            ; preds = %._crit_edge.5
  br label %._crit_edge.6

; <label>:75                                      ; preds = %._crit_edge.5
  %76 = getelementptr inbounds <4 x float>, <4 x float> addrspace(1)* %faceNormals, i32 %73
  %77 = load <4 x float>, <4 x float> addrspace(1)* %76, align 16, !tbaa !77
  %scalar12.6 = extractelement <4 x float> %77, i32 0
  %scalar13.6 = extractelement <4 x float> %77, i32 1
  %scalar14.6 = extractelement <4 x float> %77, i32 2
  %scalar15.6 = extractelement <4 x float> %77, i32 3
  %78 = fadd float %normal.116.5, %scalar12.6
  %79 = fadd float %normal.117.5, %scalar13.6
  %80 = fadd float %normal.118.5, %scalar14.6
  %81 = fadd float %normal.119.5, %scalar15.6
  br label %._crit_edge.6

._crit_edge.6:                                    ; preds = %._crit_edge.5.._crit_edge.6_crit_edge, %75
  %normal.116.6 = phi float [ %78, %75 ], [ %normal.116.5, %._crit_edge.5.._crit_edge.6_crit_edge ]
  %normal.117.6 = phi float [ %79, %75 ], [ %normal.117.5, %._crit_edge.5.._crit_edge.6_crit_edge ]
  %normal.118.6 = phi float [ %80, %75 ], [ %normal.118.5, %._crit_edge.5.._crit_edge.6_crit_edge ]
  %normal.119.6 = phi float [ %81, %75 ], [ %normal.119.5, %._crit_edge.5.._crit_edge.6_crit_edge ]
  %82 = or i32 %5, 7
  %83 = getelementptr inbounds i32, i32 addrspace(1)* %faceIndexes, i32 %82
  %84 = load i32, i32 addrspace(1)* %83, align 4, !tbaa !79
  %85 = icmp eq i32 %84, -1
  br i1 %85, label %._crit_edge.6.._crit_edge.7_crit_edge, label %86

._crit_edge.6.._crit_edge.7_crit_edge:            ; preds = %._crit_edge.6
  br label %._crit_edge.7

; <label>:86                                      ; preds = %._crit_edge.6
  %87 = getelementptr inbounds <4 x float>, <4 x float> addrspace(1)* %faceNormals, i32 %84
  %88 = load <4 x float>, <4 x float> addrspace(1)* %87, align 16, !tbaa !77
  %scalar12.7 = extractelement <4 x float> %88, i32 0
  %scalar13.7 = extractelement <4 x float> %88, i32 1
  %scalar14.7 = extractelement <4 x float> %88, i32 2
  %scalar15.7 = extractelement <4 x float> %88, i32 3
  %89 = fadd float %normal.116.6, %scalar12.7
  %90 = fadd float %normal.117.6, %scalar13.7
  %91 = fadd float %normal.118.6, %scalar14.7
  %92 = fadd float %normal.119.6, %scalar15.7
  br label %._crit_edge.7

._crit_edge.7:                                    ; preds = %._crit_edge.6.._crit_edge.7_crit_edge, %86
  %normal.116.7 = phi float [ %89, %86 ], [ %normal.116.6, %._crit_edge.6.._crit_edge.7_crit_edge ]
  %normal.117.7 = phi float [ %90, %86 ], [ %normal.117.6, %._crit_edge.6.._crit_edge.7_crit_edge ]
  %normal.118.7 = phi float [ %91, %86 ], [ %normal.118.6, %._crit_edge.6.._crit_edge.7_crit_edge ]
  %normal.119.7 = phi float [ %92, %86 ], [ %normal.119.6, %._crit_edge.6.._crit_edge.7_crit_edge ]
  %93 = fmul float %normal.119.7, %normal.119.7
  %94 = fmul float %normal.118.7, %normal.118.7
  %95 = fadd float %94, %93
  %96 = fmul float %normal.117.7, %normal.117.7
  %97 = fadd float %96, %95
  %98 = fmul float %normal.116.7, %normal.116.7
  %99 = fadd float %98, %97
  %100 = call float @genx.GenISA.sqrt.f32(float %99)
  %101 = fdiv float 1.000000e+00, %100, !fpmath !80
  %102 = fmul float %101, %normal.116.7
  %103 = fmul float %101, %normal.117.7
  %104 = fmul float %101, %normal.118.7
  %105 = fcmp oeq float %normal.116.7, 0.000000e+00
  %106 = fcmp oeq float %normal.117.7, 0.000000e+00
  %107 = fcmp oeq float %normal.118.7, 0.000000e+00
  %108 = sext i1 %105 to i32
  %109 = sext i1 %106 to i32
  %110 = sext i1 %107 to i32
  %111 = call i32 @llvm.ctlz.i32(i32 %108, i1 false)
  %112 = icmp eq i32 %111, 0
  %.sink.i.i20 = select i1 %112, float %normal.116.7, float %102
  %113 = call i32 @llvm.ctlz.i32(i32 %109, i1 false)
  %114 = icmp eq i32 %113, 0
  %.sink1.i.i25 = select i1 %114, float %normal.117.7, float %103
  %115 = call i32 @llvm.ctlz.i32(i32 %110, i1 false)
  %116 = icmp eq i32 %115, 0
  %.sink2.i.i30 = select i1 %116, float %normal.118.7, float %104
  %117 = getelementptr inbounds float, float addrspace(1)* %vbo, i32 %49
  store float %.sink.i.i20, float addrspace(1)* %117, align 4, !tbaa !81
  %118 = getelementptr inbounds float, float addrspace(1)* %vbo, i32 %60
  store float %.sink1.i.i25, float addrspace(1)* %118, align 4, !tbaa !81
  %119 = getelementptr inbounds float, float addrspace(1)* %vbo, i32 %71
  store float %.sink2.i.i30, float addrspace(1)* %119, align 4, !tbaa !81
  %120 = getelementptr inbounds float, float addrspace(1)* %vbo, i32 %82
  store float 0.000000e+00, float addrspace(1)* %120, align 4, !tbaa !81
  ret void
}

; Function Attrs: alwaysinline nounwind
define void @updateVBO(<4 x float> addrspace(1)* %positions, float addrspace(1)* %vbo, <8 x i32> %r0, <8 x i32> %payloadHeader, i16 %localIdX, i16 %localIdY, i16 %localIdZ, i8 addrspace(2)* %constBase) #0 {
  %scalar = extractelement <8 x i32> %payloadHeader, i32 0
  %groupId = extractelement <8 x i32> %r0, i32 1
  %localSize = extractelement <8 x i32> %payloadHeader, i32 3
  %1 = mul i32 %localSize, %groupId
  %2 = zext i16 %localIdX to i32
  %3 = add i32 %1, %2
  %4 = add i32 %3, %scalar
  %5 = shl i32 %4, 3
  %6 = getelementptr inbounds <4 x float>, <4 x float> addrspace(1)* %positions, i32 %4
  %7 = load <4 x float>, <4 x float> addrspace(1)* %6, align 16
  %scalar8 = extractelement <4 x float> %7, i32 0
  %8 = getelementptr inbounds float, float addrspace(1)* %vbo, i32 %5
  store float %scalar8, float addrspace(1)* %8, align 4, !tbaa !81
  %9 = load <4 x float>, <4 x float> addrspace(1)* %6, align 16
  %scalar13 = extractelement <4 x float> %9, i32 1
  %10 = or i32 %5, 1
  %11 = getelementptr inbounds float, float addrspace(1)* %vbo, i32 %10
  store float %scalar13, float addrspace(1)* %11, align 4, !tbaa !81
  %12 = load <4 x float>, <4 x float> addrspace(1)* %6, align 16
  %scalar18 = extractelement <4 x float> %12, i32 2
  %13 = or i32 %5, 2
  %14 = getelementptr inbounds float, float addrspace(1)* %vbo, i32 %13
  store float %scalar18, float addrspace(1)* %14, align 4, !tbaa !81
  %15 = or i32 %5, 3
  %16 = getelementptr inbounds float, float addrspace(1)* %vbo, i32 %15
  store float 0.000000e+00, float addrspace(1)* %16, align 4, !tbaa !81
  ret void
}

; Function Attrs: alwaysinline nounwind
define void @integrateSoftBody(<4 x float> addrspace(1)* %positions, <4 x float> addrspace(1)* %oldPositions, <4 x float> addrspace(1)* %forces, <8 x i32> %r0, <8 x i32> %payloadHeader, i16 %localIdX, i16 %localIdY, i16 %localIdZ, i8 addrspace(2)* %constBase) #0 {
  %scalar = extractelement <8 x i32> %payloadHeader, i32 0
  %groupId = extractelement <8 x i32> %r0, i32 1
  %localSize = extractelement <8 x i32> %payloadHeader, i32 3
  %1 = mul i32 %localSize, %groupId
  %2 = zext i16 %localIdX to i32
  %3 = add i32 %1, %2
  %4 = add i32 %3, %scalar
  %5 = getelementptr inbounds <4 x float>, <4 x float> addrspace(1)* %positions, i32 %4
  %6 = load <4 x float>, <4 x float> addrspace(1)* %5, align 16, !tbaa !77
  %scalar8 = extractelement <4 x float> %6, i32 0
  %scalar9 = extractelement <4 x float> %6, i32 1
  %scalar10 = extractelement <4 x float> %6, i32 2
  %scalar11 = extractelement <4 x float> %6, i32 3
  %7 = getelementptr inbounds <4 x float>, <4 x float> addrspace(1)* %oldPositions, i32 %4
  %8 = load <4 x float>, <4 x float> addrspace(1)* %7, align 16, !tbaa !77
  %scalar12 = extractelement <4 x float> %8, i32 0
  %scalar13 = extractelement <4 x float> %8, i32 1
  %scalar14 = extractelement <4 x float> %8, i32 2
  %scalar15 = extractelement <4 x float> %8, i32 3
  %9 = fsub float %scalar8, %scalar12
  %10 = fsub float %scalar9, %scalar13
  %11 = fsub float %scalar10, %scalar14
  %12 = fsub float %scalar11, %scalar15
  %13 = fmul float %9, 0x3FEDC28F60000000
  %14 = fmul float %10, 0x3FEDC28F60000000
  %15 = fmul float %11, 0x3FEDC28F60000000
  %16 = fmul float %12, 0x3FEDC28F60000000
  %17 = getelementptr inbounds <4 x float>, <4 x float> addrspace(1)* %forces, i32 %4
  %18 = load <4 x float>, <4 x float> addrspace(1)* %17, align 16, !tbaa !77
  %scalar16 = extractelement <4 x float> %18, i32 0
  %scalar17 = extractelement <4 x float> %18, i32 1
  %scalar18 = extractelement <4 x float> %18, i32 2
  %scalar19 = extractelement <4 x float> %18, i32 3
  %19 = fmul float %scalar16, 0x3F847AE140000000
  %20 = fmul float %scalar17, 0x3F847AE140000000
  %21 = fmul float %scalar18, 0x3F847AE140000000
  %22 = fmul float %scalar19, 0x3F847AE140000000
  %23 = fmul float %19, 0x3F847AE140000000
  %24 = fmul float %20, 0x3F847AE140000000
  %25 = fmul float %21, 0x3F847AE140000000
  %26 = fmul float %22, 0x3F847AE140000000
  %27 = fadd float %13, %23
  %28 = fadd float %14, %24
  %29 = fadd float %15, %25
  %30 = fadd float %16, %26
  %31 = fadd float %scalar8, %27
  %32 = fadd float %scalar9, %28
  %33 = fadd float %scalar10, %29
  %34 = fadd float %scalar11, %30
  %assembled.vect = insertelement <4 x float> undef, float %31, i32 0
  %assembled.vect24 = insertelement <4 x float> %assembled.vect, float %32, i32 1
  %assembled.vect25 = insertelement <4 x float> %assembled.vect24, float %33, i32 2
  %assembled.vect26 = insertelement <4 x float> %assembled.vect25, float %34, i32 3
  store <4 x float> %assembled.vect26, <4 x float> addrspace(1)* %5, align 16, !tbaa !77
  store <4 x float> %6, <4 x float> addrspace(1)* %7, align 16, !tbaa !77
  ret void
}

; Function Attrs: alwaysinline nounwind
define void @satisfyConstraints(<4 x float> addrspace(1)* %positions, i32 addrspace(1)* %neighbours, i32 addrspace(1)* %offsets, float %tick, i32 %startOffset, <8 x i32> %r0, <8 x i32> %payloadHeader, i16 %localIdX, i16 %localIdY, i16 %localIdZ, i8 addrspace(2)* %constBase) #0 {
  %scalar = extractelement <8 x i32> %payloadHeader, i32 0
  %groupId = extractelement <8 x i32> %r0, i32 1
  %localSize = extractelement <8 x i32> %payloadHeader, i32 3
  %1 = mul i32 %localSize, %groupId
  %2 = zext i16 %localIdX to i32
  %3 = add i32 %1, %2
  %4 = add i32 %3, %scalar
  %5 = getelementptr inbounds i32, i32 addrspace(1)* %offsets, i32 %4
  %6 = load i32, i32 addrspace(1)* %5, align 4, !tbaa !79
  %7 = add nsw i32 %6, %startOffset
  %8 = shl nsw i32 %7, 3
  %9 = getelementptr inbounds <4 x float>, <4 x float> addrspace(1)* %positions, i32 %7
  br label %10

._crit_edge:                                      ; preds = %._crit_edge97.3
  %castcollisionObjectPositionArray6 = bitcast i8 addrspace(2)* %constBase to [36 x float] addrspace(2)*
  %.pre = load <4 x float>, <4 x float> addrspace(1)* %9, align 16, !tbaa !77
  br label %69

; <label>:10                                      ; preds = %._crit_edge97.3, %0
  %z.0119 = phi i32 [ 0, %0 ], [ %851, %._crit_edge97.3 ]
  %11 = icmp slt i32 %z.0119, 4
  br i1 %11, label %12, label %14

; <label>:12                                      ; preds = %10
  %13 = sub nsw i32 3, %z.0119
  br label %17

; <label>:14                                      ; preds = %10
  %15 = sub i32 12, %z.0119
  %16 = add nsw i32 %15, -1
  br label %17

; <label>:17                                      ; preds = %14, %12
  %18 = phi i32 [ %13, %12 ], [ %16, %14 ]
  %19 = sub nsw i32 7, %18
  %20 = add nsw i32 %8, %19
  %21 = getelementptr inbounds i32, i32 addrspace(1)* %neighbours, i32 %20
  %22 = load i32, i32 addrspace(1)* %21, align 4, !tbaa !79
  %23 = icmp sgt i32 %22, -1
  br i1 %23, label %24, label %._crit_edge97

; <label>:24                                      ; preds = %17
  %25 = icmp sgt i32 %19, 2
  br i1 %25, label %26, label %._crit_edge98

; <label>:26                                      ; preds = %24
  %27 = call float @genx.GenISA.sqrt.f32(float 0x3F947AE160000000)
  br label %._crit_edge98

._crit_edge98:                                    ; preds = %24, %26
  %rest.0 = phi float [ %27, %26 ], [ 0x3FB99999A0000000, %24 ]
  %28 = icmp sgt i32 %19, 4
  br i1 %28, label %29, label %._crit_edge99

; <label>:29                                      ; preds = %._crit_edge98
  %30 = fmul float %rest.0, 2.000000e+00
  %31 = fmul float %30, %30
  %32 = fmul float %rest.0, %rest.0
  %33 = fadd float %31, %32
  %34 = call float @genx.GenISA.sqrt.f32(float %33)
  br label %._crit_edge99

._crit_edge99:                                    ; preds = %._crit_edge98, %29
  %rest.1 = phi float [ %34, %29 ], [ %rest.0, %._crit_edge98 ]
  %35 = load <4 x float>, <4 x float> addrspace(1)* %9, align 16, !tbaa !77
  %scalar38 = extractelement <4 x float> %35, i32 0
  %scalar39 = extractelement <4 x float> %35, i32 1
  %scalar40 = extractelement <4 x float> %35, i32 2
  %scalar41 = extractelement <4 x float> %35, i32 3
  %36 = getelementptr inbounds <4 x float>, <4 x float> addrspace(1)* %positions, i32 %22
  %37 = load <4 x float>, <4 x float> addrspace(1)* %36, align 16, !tbaa !77
  %scalar42 = extractelement <4 x float> %37, i32 0
  %scalar43 = extractelement <4 x float> %37, i32 1
  %scalar44 = extractelement <4 x float> %37, i32 2
  %scalar45 = extractelement <4 x float> %37, i32 3
  %38 = fsub float %scalar38, %scalar42
  %39 = fsub float %scalar39, %scalar43
  %40 = fsub float %scalar40, %scalar44
  %41 = fsub float %scalar41, %scalar45
  %42 = fmul float %41, %41
  %43 = fmul float %40, %40
  %44 = fadd float %43, %42
  %45 = fmul float %39, %39
  %46 = fadd float %45, %44
  %47 = fmul float %38, %38
  %48 = fadd float %47, %46
  %49 = call float @genx.GenISA.sqrt.f32(float %48)
  %50 = fsub float %49, %rest.1
  %51 = fdiv float %50, %49, !fpmath !80
  %52 = fmul float %51, 5.000000e-01
  %53 = fmul float %52, 0x3FECCCCCC0000000
  %54 = fmul float %38, %53
  %55 = fmul float %39, %53
  %56 = fmul float %40, %53
  %57 = fmul float %41, %53
  %58 = fsub float %scalar38, %54
  %59 = fsub float %scalar39, %55
  %60 = fsub float %scalar40, %56
  %61 = fsub float %scalar41, %57
  %assembled.vect = insertelement <4 x float> undef, float %58, i32 0
  %assembled.vect70 = insertelement <4 x float> %assembled.vect, float %59, i32 1
  %assembled.vect71 = insertelement <4 x float> %assembled.vect70, float %60, i32 2
  %assembled.vect72 = insertelement <4 x float> %assembled.vect71, float %61, i32 3
  store <4 x float> %assembled.vect72, <4 x float> addrspace(1)* %9, align 16, !tbaa !77
  %62 = load <4 x float>, <4 x float> addrspace(1)* %36, align 16, !tbaa !77
  %scalar50 = extractelement <4 x float> %62, i32 0
  %scalar51 = extractelement <4 x float> %62, i32 1
  %scalar52 = extractelement <4 x float> %62, i32 2
  %scalar53 = extractelement <4 x float> %62, i32 3
  %63 = fadd float %scalar50, %54
  %64 = fadd float %scalar51, %55
  %65 = fadd float %scalar52, %56
  %66 = fadd float %scalar53, %57
  %assembled.vect73 = insertelement <4 x float> undef, float %63, i32 0
  %assembled.vect74 = insertelement <4 x float> %assembled.vect73, float %64, i32 1
  %assembled.vect75 = insertelement <4 x float> %assembled.vect74, float %65, i32 2
  %assembled.vect76 = insertelement <4 x float> %assembled.vect75, float %66, i32 3
  store <4 x float> %assembled.vect76, <4 x float> addrspace(1)* %36, align 16, !tbaa !77
  br label %._crit_edge97

._crit_edge97:                                    ; preds = %17, %._crit_edge99
  %67 = or i32 %z.0119, 1
  %68 = icmp slt i32 %67, 4
  br i1 %68, label %685, label %682

; <label>:69                                      ; preds = %._crit_edge, %_Z6lengthDv4_f.exit._crit_edge
  %70 = phi <4 x float> [ %.pre, %._crit_edge ], [ %274, %_Z6lengthDv4_f.exit._crit_edge ]
  %n.0118 = phi i32 [ 0, %._crit_edge ], [ %275, %_Z6lengthDv4_f.exit._crit_edge ]
  %71 = shl nsw i32 %n.0118, 2
  %72 = getelementptr inbounds [36 x float], [36 x float] addrspace(2)* %castcollisionObjectPositionArray6, i32 0, i32 %71
  %73 = load float, float addrspace(2)* %72, align 1, !tbaa !81
  %74 = add i32 %71, 1
  %75 = getelementptr inbounds [36 x float], [36 x float] addrspace(2)* %castcollisionObjectPositionArray6, i32 0, i32 %74
  %76 = load float, float addrspace(2)* %75, align 1, !tbaa !81
  %77 = add i32 %71, 2
  %78 = getelementptr inbounds [36 x float], [36 x float] addrspace(2)* %castcollisionObjectPositionArray6, i32 0, i32 %77
  %79 = load float, float addrspace(2)* %78, align 1, !tbaa !81
  %80 = fadd float %79, 7.000000e+00
  %81 = add i32 %71, 3
  %82 = getelementptr inbounds [36 x float], [36 x float] addrspace(2)* %castcollisionObjectPositionArray6, i32 0, i32 %81
  %83 = load float, float addrspace(2)* %82, align 1, !tbaa !81
  %scalar54 = extractelement <4 x float> %70, i32 0
  %scalar55 = extractelement <4 x float> %70, i32 1
  %scalar56 = extractelement <4 x float> %70, i32 2
  %scalar57 = extractelement <4 x float> %70, i32 3
  %84 = fsub float %scalar54, %73
  %85 = fsub float %scalar55, %76
  %86 = fsub float %scalar56, %80
  %87 = fsub float %scalar57, %83
  %88 = fcmp ult float %84, 0.000000e+00
  br i1 %88, label %89, label %_Z5isinff.exit.i.i

; <label>:89                                      ; preds = %69
  %90 = fsub float -0.000000e+00, %84
  br label %_Z5isinff.exit.i.i

_Z5isinff.exit.i.i:                               ; preds = %69, %89
  %91 = phi float [ %90, %89 ], [ %84, %69 ]
  %92 = fcmp oeq float %91, 0x7FF0000000000000
  br i1 %92, label %_Z5hypotff.exit.i, label %93

; <label>:93                                      ; preds = %_Z5isinff.exit.i.i
  %94 = fcmp ult float %85, 0.000000e+00
  br i1 %94, label %95, label %_Z5isinff.exit1.i.i

; <label>:95                                      ; preds = %93
  %96 = fsub float -0.000000e+00, %85
  br label %_Z5isinff.exit1.i.i

_Z5isinff.exit1.i.i:                              ; preds = %93, %95
  %97 = phi float [ %96, %95 ], [ %85, %93 ]
  %98 = fcmp oeq float %97, 0x7FF0000000000000
  br i1 %98, label %_Z5hypotff.exit.i, label %99

; <label>:99                                      ; preds = %_Z5isinff.exit1.i.i
  %100 = fcmp uno float %84, %85
  br i1 %100, label %_Z5hypotff.exit.i, label %101

; <label>:101                                     ; preds = %99
  br i1 %88, label %102, label %_Z4fabsf.exit.i.i

; <label>:102                                     ; preds = %101
  %103 = fsub float -0.000000e+00, %84
  br label %_Z4fabsf.exit.i.i

_Z4fabsf.exit.i.i:                                ; preds = %101, %102
  %104 = phi float [ %103, %102 ], [ %84, %101 ]
  br i1 %94, label %105, label %_Z4fabsf.exit2.i.i

; <label>:105                                     ; preds = %_Z4fabsf.exit.i.i
  %106 = fsub float -0.000000e+00, %85
  br label %_Z4fabsf.exit2.i.i

_Z4fabsf.exit2.i.i:                               ; preds = %_Z4fabsf.exit.i.i, %105
  %107 = phi float [ %106, %105 ], [ %85, %_Z4fabsf.exit.i.i ]
  %108 = fcmp oge float %104, %107
  %109 = select i1 %108, float %104, float %107
  %110 = fcmp ole float %104, %107
  %111 = select i1 %110, float %104, float %107
  %112 = fcmp oge float %109, 0x43DFFFFFE0000000
  br i1 %112, label %113, label %_Z4fabsf.exit2.i.i._crit_edge

; <label>:113                                     ; preds = %_Z4fabsf.exit2.i.i
  %114 = fcmp olt float %111, 0x3C00000000000000
  br label %_Z4fabsf.exit2.i.i._crit_edge

_Z4fabsf.exit2.i.i._crit_edge:                    ; preds = %_Z4fabsf.exit2.i.i, %113
  %115 = phi i1 [ %114, %113 ], [ false, %_Z4fabsf.exit2.i.i ]
  %116 = fadd float %109, %111
  %117 = call float @genx.GenISA.sqrt.f32(float %116)
  %118 = fmul float %109, %111
  %119 = fmul float %118, 2.000000e+00
  %120 = fdiv float %119, %116, !fpmath !80
  %121 = fsub float %116, %120
  %122 = call float @genx.GenISA.sqrt.f32(float %121)
  %123 = fmul float %117, %122
  br i1 %112, label %._crit_edge101, label %124

; <label>:124                                     ; preds = %_Z4fabsf.exit2.i.i._crit_edge
  %125 = fcmp olt float %111, 0x3C00000000000000
  br label %._crit_edge101

._crit_edge101:                                   ; preds = %_Z4fabsf.exit2.i.i._crit_edge, %124
  %126 = phi i1 [ %125, %124 ], [ true, %_Z4fabsf.exit2.i.i._crit_edge ]
  %127 = fdiv float %111, %109, !fpmath !80
  %128 = fmul float %127, %127
  %129 = fadd float %128, 1.000000e+00
  %130 = call float @genx.GenISA.sqrt.f32(float %129)
  %131 = fmul float %109, %130
  %132 = fmul float %109, %109
  %133 = fmul float %111, %111
  %134 = fadd float %132, %133
  %135 = call float @genx.GenISA.sqrt.f32(float %134)
  %136 = fcmp oeq float %109, 0.000000e+00
  br i1 %136, label %_Z5hypotff.exit.i, label %137

; <label>:137                                     ; preds = %._crit_edge101
  br i1 %115, label %138, label %144

; <label>:138                                     ; preds = %137
  %139 = fcmp oeq float %116, %109
  br i1 %139, label %140, label %._crit_edge103

; <label>:140                                     ; preds = %138
  %141 = fmul float %111, 2.000000e+00
  %142 = fsub float %109, %141
  %143 = fcmp oeq float %142, %109
  br i1 %143, label %_Z5hypotff.exit.i, label %._crit_edge103

._crit_edge103:                                   ; preds = %140, %138
  br label %_Z5hypotff.exit.i

; <label>:144                                     ; preds = %137
  %..i.i = select i1 %126, float %131, float %135
  br label %_Z5hypotff.exit.i

_Z5hypotff.exit.i:                                ; preds = %140, %._crit_edge101, %99, %_Z5isinff.exit1.i.i, %_Z5isinff.exit.i.i, %144, %._crit_edge103
  %result.0.i.i = phi float [ %123, %._crit_edge103 ], [ %..i.i, %144 ], [ 0x7FF0000000000000, %_Z5isinff.exit.i.i ], [ 0x7FF0000000000000, %_Z5isinff.exit1.i.i ], [ 0x7FFFFFFFE0000000, %99 ], [ 0.000000e+00, %._crit_edge101 ], [ %109, %140 ]
  %145 = fcmp ult float %86, 0.000000e+00
  br i1 %145, label %146, label %_Z5isinff.exit.i1.i

; <label>:146                                     ; preds = %_Z5hypotff.exit.i
  %147 = fsub float -0.000000e+00, %86
  br label %_Z5isinff.exit.i1.i

_Z5isinff.exit.i1.i:                              ; preds = %_Z5hypotff.exit.i, %146
  %148 = phi float [ %147, %146 ], [ %86, %_Z5hypotff.exit.i ]
  %149 = fcmp oeq float %148, 0x7FF0000000000000
  br i1 %149, label %_Z5hypotff.exit7.i, label %150

; <label>:150                                     ; preds = %_Z5isinff.exit.i1.i
  %151 = fcmp ult float %87, 0.000000e+00
  br i1 %151, label %152, label %_Z5isinff.exit1.i2.i

; <label>:152                                     ; preds = %150
  %153 = fsub float -0.000000e+00, %87
  br label %_Z5isinff.exit1.i2.i

_Z5isinff.exit1.i2.i:                             ; preds = %150, %152
  %154 = phi float [ %153, %152 ], [ %87, %150 ]
  %155 = fcmp oeq float %154, 0x7FF0000000000000
  br i1 %155, label %_Z5hypotff.exit7.i, label %156

; <label>:156                                     ; preds = %_Z5isinff.exit1.i2.i
  %157 = fcmp uno float %86, %87
  br i1 %157, label %_Z5hypotff.exit7.i, label %158

; <label>:158                                     ; preds = %156
  br i1 %145, label %159, label %_Z4fabsf.exit.i3.i

; <label>:159                                     ; preds = %158
  %160 = fsub float -0.000000e+00, %86
  br label %_Z4fabsf.exit.i3.i

_Z4fabsf.exit.i3.i:                               ; preds = %158, %159
  %161 = phi float [ %160, %159 ], [ %86, %158 ]
  br i1 %151, label %162, label %_Z4fabsf.exit2.i4.i

; <label>:162                                     ; preds = %_Z4fabsf.exit.i3.i
  %163 = fsub float -0.000000e+00, %87
  br label %_Z4fabsf.exit2.i4.i

_Z4fabsf.exit2.i4.i:                              ; preds = %_Z4fabsf.exit.i3.i, %162
  %164 = phi float [ %163, %162 ], [ %87, %_Z4fabsf.exit.i3.i ]
  %165 = fcmp oge float %161, %164
  %166 = select i1 %165, float %161, float %164
  %167 = fcmp ole float %161, %164
  %168 = select i1 %167, float %161, float %164
  %169 = fcmp oge float %166, 0x43DFFFFFE0000000
  br i1 %169, label %170, label %_Z4fabsf.exit2.i4.i._crit_edge

; <label>:170                                     ; preds = %_Z4fabsf.exit2.i4.i
  %171 = fcmp olt float %168, 0x3C00000000000000
  br label %_Z4fabsf.exit2.i4.i._crit_edge

_Z4fabsf.exit2.i4.i._crit_edge:                   ; preds = %_Z4fabsf.exit2.i4.i, %170
  %172 = phi i1 [ %171, %170 ], [ false, %_Z4fabsf.exit2.i4.i ]
  %173 = fadd float %166, %168
  %174 = call float @genx.GenISA.sqrt.f32(float %173)
  %175 = fmul float %166, %168
  %176 = fmul float %175, 2.000000e+00
  %177 = fdiv float %176, %173, !fpmath !80
  %178 = fsub float %173, %177
  %179 = call float @genx.GenISA.sqrt.f32(float %178)
  %180 = fmul float %174, %179
  br i1 %169, label %._crit_edge107, label %181

; <label>:181                                     ; preds = %_Z4fabsf.exit2.i4.i._crit_edge
  %182 = fcmp olt float %168, 0x3C00000000000000
  br label %._crit_edge107

._crit_edge107:                                   ; preds = %_Z4fabsf.exit2.i4.i._crit_edge, %181
  %183 = phi i1 [ %182, %181 ], [ true, %_Z4fabsf.exit2.i4.i._crit_edge ]
  %184 = fdiv float %168, %166, !fpmath !80
  %185 = fmul float %184, %184
  %186 = fadd float %185, 1.000000e+00
  %187 = call float @genx.GenISA.sqrt.f32(float %186)
  %188 = fmul float %166, %187
  %189 = fmul float %166, %166
  %190 = fmul float %168, %168
  %191 = fadd float %189, %190
  %192 = call float @genx.GenISA.sqrt.f32(float %191)
  %193 = fcmp oeq float %166, 0.000000e+00
  br i1 %193, label %_Z5hypotff.exit7.i, label %194

; <label>:194                                     ; preds = %._crit_edge107
  br i1 %172, label %195, label %201

; <label>:195                                     ; preds = %194
  %196 = fcmp oeq float %173, %166
  br i1 %196, label %197, label %._crit_edge109

; <label>:197                                     ; preds = %195
  %198 = fmul float %168, 2.000000e+00
  %199 = fsub float %166, %198
  %200 = fcmp oeq float %199, %166
  br i1 %200, label %_Z5hypotff.exit7.i, label %._crit_edge109

._crit_edge109:                                   ; preds = %197, %195
  br label %_Z5hypotff.exit7.i

; <label>:201                                     ; preds = %194
  %..i5.i = select i1 %183, float %188, float %192
  br label %_Z5hypotff.exit7.i

_Z5hypotff.exit7.i:                               ; preds = %197, %._crit_edge107, %156, %_Z5isinff.exit1.i2.i, %_Z5isinff.exit.i1.i, %201, %._crit_edge109
  %result.0.i6.i = phi float [ %180, %._crit_edge109 ], [ %..i5.i, %201 ], [ 0x7FF0000000000000, %_Z5isinff.exit.i1.i ], [ 0x7FF0000000000000, %_Z5isinff.exit1.i2.i ], [ 0x7FFFFFFFE0000000, %156 ], [ 0.000000e+00, %._crit_edge107 ], [ %166, %197 ]
  %202 = fcmp ult float %result.0.i.i, 0.000000e+00
  br i1 %202, label %203, label %_Z5isinff.exit.i8.i

; <label>:203                                     ; preds = %_Z5hypotff.exit7.i
  %204 = fsub float -0.000000e+00, %result.0.i.i
  br label %_Z5isinff.exit.i8.i

_Z5isinff.exit.i8.i:                              ; preds = %_Z5hypotff.exit7.i, %203
  %205 = phi float [ %204, %203 ], [ %result.0.i.i, %_Z5hypotff.exit7.i ]
  %206 = fcmp oeq float %205, 0x7FF0000000000000
  br i1 %206, label %_Z6lengthDv4_f.exit, label %207

; <label>:207                                     ; preds = %_Z5isinff.exit.i8.i
  %208 = fcmp ult float %result.0.i6.i, 0.000000e+00
  br i1 %208, label %209, label %_Z5isinff.exit1.i9.i

; <label>:209                                     ; preds = %207
  %210 = fsub float -0.000000e+00, %result.0.i6.i
  br label %_Z5isinff.exit1.i9.i

_Z5isinff.exit1.i9.i:                             ; preds = %207, %209
  %211 = phi float [ %210, %209 ], [ %result.0.i6.i, %207 ]
  %212 = fcmp oeq float %211, 0x7FF0000000000000
  br i1 %212, label %_Z6lengthDv4_f.exit, label %213

; <label>:213                                     ; preds = %_Z5isinff.exit1.i9.i
  %214 = fcmp uno float %result.0.i.i, %result.0.i6.i
  br i1 %214, label %_Z6lengthDv4_f.exit, label %215

; <label>:215                                     ; preds = %213
  br i1 %202, label %216, label %_Z4fabsf.exit.i10.i

; <label>:216                                     ; preds = %215
  %217 = fsub float -0.000000e+00, %result.0.i.i
  br label %_Z4fabsf.exit.i10.i

_Z4fabsf.exit.i10.i:                              ; preds = %215, %216
  %218 = phi float [ %217, %216 ], [ %result.0.i.i, %215 ]
  br i1 %208, label %219, label %_Z4fabsf.exit2.i11.i

; <label>:219                                     ; preds = %_Z4fabsf.exit.i10.i
  %220 = fsub float -0.000000e+00, %result.0.i6.i
  br label %_Z4fabsf.exit2.i11.i

_Z4fabsf.exit2.i11.i:                             ; preds = %_Z4fabsf.exit.i10.i, %219
  %221 = phi float [ %220, %219 ], [ %result.0.i6.i, %_Z4fabsf.exit.i10.i ]
  %222 = fcmp oge float %218, %221
  %223 = select i1 %222, float %218, float %221
  %224 = fcmp ole float %218, %221
  %225 = select i1 %224, float %218, float %221
  %226 = fcmp oge float %223, 0x43DFFFFFE0000000
  br i1 %226, label %227, label %_Z4fabsf.exit2.i11.i._crit_edge

; <label>:227                                     ; preds = %_Z4fabsf.exit2.i11.i
  %228 = fcmp olt float %225, 0x3C00000000000000
  br label %_Z4fabsf.exit2.i11.i._crit_edge

_Z4fabsf.exit2.i11.i._crit_edge:                  ; preds = %_Z4fabsf.exit2.i11.i, %227
  %229 = phi i1 [ %228, %227 ], [ false, %_Z4fabsf.exit2.i11.i ]
  %230 = fadd float %223, %225
  %231 = call float @genx.GenISA.sqrt.f32(float %230)
  %232 = fmul float %223, %225
  %233 = fmul float %232, 2.000000e+00
  %234 = fdiv float %233, %230, !fpmath !80
  %235 = fsub float %230, %234
  %236 = call float @genx.GenISA.sqrt.f32(float %235)
  %237 = fmul float %231, %236
  br i1 %226, label %._crit_edge113, label %238

; <label>:238                                     ; preds = %_Z4fabsf.exit2.i11.i._crit_edge
  %239 = fcmp olt float %225, 0x3C00000000000000
  br label %._crit_edge113

._crit_edge113:                                   ; preds = %_Z4fabsf.exit2.i11.i._crit_edge, %238
  %240 = phi i1 [ %239, %238 ], [ true, %_Z4fabsf.exit2.i11.i._crit_edge ]
  %241 = fdiv float %225, %223, !fpmath !80
  %242 = fmul float %241, %241
  %243 = fadd float %242, 1.000000e+00
  %244 = call float @genx.GenISA.sqrt.f32(float %243)
  %245 = fmul float %223, %244
  %246 = fmul float %223, %223
  %247 = fmul float %225, %225
  %248 = fadd float %246, %247
  %249 = call float @genx.GenISA.sqrt.f32(float %248)
  %250 = fcmp oeq float %223, 0.000000e+00
  br i1 %250, label %_Z6lengthDv4_f.exit, label %251

; <label>:251                                     ; preds = %._crit_edge113
  br i1 %229, label %252, label %258

; <label>:252                                     ; preds = %251
  %253 = fcmp oeq float %230, %223
  br i1 %253, label %254, label %._crit_edge115

; <label>:254                                     ; preds = %252
  %255 = fmul float %225, 2.000000e+00
  %256 = fsub float %223, %255
  %257 = fcmp oeq float %256, %223
  br i1 %257, label %_Z6lengthDv4_f.exit, label %._crit_edge115

._crit_edge115:                                   ; preds = %254, %252
  br label %_Z6lengthDv4_f.exit

; <label>:258                                     ; preds = %251
  %..i12.i = select i1 %240, float %245, float %249
  br label %_Z6lengthDv4_f.exit

_Z6lengthDv4_f.exit:                              ; preds = %254, %._crit_edge113, %213, %_Z5isinff.exit1.i9.i, %_Z5isinff.exit.i8.i, %._crit_edge115, %258
  %result.0.i13.i = phi float [ %237, %._crit_edge115 ], [ %..i12.i, %258 ], [ 0x7FF0000000000000, %_Z5isinff.exit.i8.i ], [ 0x7FF0000000000000, %_Z5isinff.exit1.i9.i ], [ 0x7FFFFFFFE0000000, %213 ], [ 0.000000e+00, %._crit_edge113 ], [ %223, %254 ]
  %259 = fcmp olt float %result.0.i13.i, 0x40159999A0000000
  br i1 %259, label %260, label %_Z6lengthDv4_f.exit._crit_edge

; <label>:260                                     ; preds = %_Z6lengthDv4_f.exit
  %261 = fdiv float %84, %result.0.i13.i
  %262 = fdiv float %85, %result.0.i13.i
  %263 = fdiv float %86, %result.0.i13.i
  %264 = fdiv float %87, %result.0.i13.i
  %265 = fadd float %result.0.i13.i, 0xC0159999A0000000
  %266 = fmul float %261, %265
  %267 = fmul float %262, %265
  %268 = fmul float %263, %265
  %269 = fmul float %264, %265
  %270 = fsub float %scalar54, %266
  %271 = fsub float %scalar55, %267
  %272 = fsub float %scalar56, %268
  %273 = fsub float %scalar57, %269
  %assembled.vect77 = insertelement <4 x float> undef, float %270, i32 0
  %assembled.vect78 = insertelement <4 x float> %assembled.vect77, float %271, i32 1
  %assembled.vect79 = insertelement <4 x float> %assembled.vect78, float %272, i32 2
  %assembled.vect80 = insertelement <4 x float> %assembled.vect79, float %273, i32 3
  store <4 x float> %assembled.vect80, <4 x float> addrspace(1)* %9, align 16, !tbaa !77
  br label %_Z6lengthDv4_f.exit._crit_edge

_Z6lengthDv4_f.exit._crit_edge:                   ; preds = %_Z6lengthDv4_f.exit, %260
  %274 = phi <4 x float> [ %assembled.vect80, %260 ], [ %70, %_Z6lengthDv4_f.exit ]
  %275 = add nsw i32 %n.0118, 1
  %276 = icmp slt i32 %275, 9
  br i1 %276, label %69, label %277

; <label>:277                                     ; preds = %_Z6lengthDv4_f.exit._crit_edge
  %scalar62 = extractelement <4 x float> %274, i32 0
  %scalar63 = extractelement <4 x float> %274, i32 1
  %scalar64 = extractelement <4 x float> %274, i32 2
  %scalar65 = extractelement <4 x float> %274, i32 3
  %278 = fcmp oge float %scalar62, -2.500000e+02
  %279 = select i1 %278, float %scalar62, float -2.500000e+02
  %280 = fcmp oge float %scalar63, 1.000000e+00
  %281 = select i1 %280, float %scalar63, float 1.000000e+00
  %282 = fcmp oge float %scalar64, -2.500000e+02
  %283 = select i1 %282, float %scalar64, float -2.500000e+02
  %284 = fcmp oge float %scalar65, 0.000000e+00
  %285 = select i1 %284, float %scalar65, float 0.000000e+00
  %286 = fcmp ole float %279, 2.500000e+02
  %287 = select i1 %286, float %279, float 2.500000e+02
  %288 = fcmp ole float %281, 1.000000e+02
  %289 = select i1 %288, float %281, float 1.000000e+02
  %290 = fcmp ole float %283, 2.500000e+02
  %291 = select i1 %290, float %283, float 2.500000e+02
  %292 = fcmp ole float %285, 0.000000e+00
  %293 = select i1 %292, float %285, float 0.000000e+00
  %assembled.vect85 = insertelement <4 x float> undef, float %287, i32 0
  %assembled.vect86 = insertelement <4 x float> %assembled.vect85, float %289, i32 1
  %assembled.vect87 = insertelement <4 x float> %assembled.vect86, float %291, i32 2
  %assembled.vect88 = insertelement <4 x float> %assembled.vect87, float %293, i32 3
  store <4 x float> %assembled.vect88, <4 x float> addrspace(1)* %9, align 16, !tbaa !77
  %294 = fmul float %tick, 0x3F9EB851E0000000
  %295 = bitcast float %294 to i32
  %296 = and i32 %295, 2147483647
  %297 = bitcast i32 %296 to float
  %298 = fcmp ogt float %297, 1.000000e+04
  br i1 %298, label %329, label %.thread.i.i

.thread.i.i:                                      ; preds = %277
  %299 = and i32 %295, -2147483648
  %300 = fmul float %297, 0x3FD45F3060000000
  %301 = fadd float %300, 0x4168000000000000
  %302 = bitcast float %301 to i32
  %303 = shl i32 %302, 31
  %304 = fadd float %301, 0xC168000000000000
  %305 = fmul float %304, 3.140625e+00
  %306 = fsub float %297, %305
  %307 = fmul float %304, 0x3F4FB40000000000
  %308 = fsub float %306, %307
  %309 = fmul float %304, 0x3E84440000000000
  %310 = fsub float %308, %309
  %311 = fmul float %304, 0x3D968C2340000000
  %312 = fsub float %310, %311
  %313 = fmul float %312, %312
  %314 = bitcast float %312 to i32
  %315 = xor i32 %314, %303
  %316 = bitcast i32 %315 to float
  %317 = fmul float %313, 0x3EC5DBDF00000000
  %318 = fadd float %317, 0xBF29F6FFE0000000
  %319 = fmul float %313, %318
  %320 = fadd float %319, 0x3F8110ED40000000
  %321 = fmul float %313, %320
  %322 = fadd float %321, 0xBFC55554C0000000
  %323 = fmul float %313, %322
  %324 = fmul float %316, %323
  %325 = fadd float %316, %324
  %326 = bitcast float %325 to i32
  %327 = xor i32 %326, %299
  %328 = bitcast i32 %327 to float
  br label %_Z3sinf.exit

; <label>:329                                     ; preds = %277
  %330 = and i32 %295, 2139095040
  %331 = bitcast i32 %330 to float
  %332 = fcmp oeq float %331, 0x7FF0000000000000
  %333 = lshr i32 %295, 23
  %334 = and i32 %333, 255
  %335 = mul i32 %334, 3
  %off__ocl_svml_trig_reduction_data29 = getelementptr i8, i8 addrspace(2)* %constBase, i32 4308
  %336 = bitcast i8 addrspace(2)* %off__ocl_svml_trig_reduction_data29 to float addrspace(2)*
  %337 = getelementptr inbounds float, float addrspace(2)* %336, i32 %335
  %338 = load float, float addrspace(2)* %337, align 1, !tbaa !81
  %.sum.i.i = add i32 %335, 1
  %339 = getelementptr inbounds float, float addrspace(2)* %336, i32 %.sum.i.i
  %340 = load float, float addrspace(2)* %339, align 1, !tbaa !81
  %.sum4.i.i = add i32 %335, 2
  %341 = getelementptr inbounds float, float addrspace(2)* %336, i32 %.sum4.i.i
  %342 = load float, float addrspace(2)* %341, align 1, !tbaa !81
  %343 = bitcast float %338 to i32
  %344 = bitcast float %340 to i32
  %345 = bitcast float %342 to i32
  %346 = lshr i32 %343, 16
  %347 = and i32 %343, 65535
  %348 = lshr i32 %344, 16
  %349 = and i32 %344, 65535
  %350 = lshr i32 %345, 16
  %351 = and i32 %345, 65535
  %352 = lshr i32 %295, 16
  %353 = and i32 %352, 127
  %354 = or i32 %353, 128
  %355 = and i32 %295, 65535
  %356 = mul i32 %347, %354
  %357 = mul i32 %348, %354
  %358 = mul i32 %349, %354
  %359 = mul i32 %350, %354
  %360 = mul i32 %351, %354
  %361 = mul i32 %346, %355
  %362 = mul i32 %347, %355
  %363 = mul i32 %348, %355
  %364 = mul i32 %349, %355
  %365 = mul i32 %350, %355
  %366 = lshr i32 %365, 16
  %367 = lshr i32 %364, 16
  %368 = lshr i32 %363, 16
  %369 = add i32 %367, %358
  %370 = and i32 %364, 65535
  %371 = and i32 %363, 65535
  %372 = and i32 %362, 65535
  %373 = add i32 %369, %371
  %374 = add i32 %361, %356
  %375 = lshr i32 %360, 16
  %376 = add i32 %370, %359
  %377 = add i32 %376, %366
  %378 = add i32 %377, %375
  %379 = lshr i32 %378, 16
  %380 = add i32 %373, %379
  %381 = lshr i32 %380, 16
  %382 = and i32 %378, 65535
  %383 = shl i32 %374, 16
  %384 = add i32 %383, %362
  %385 = and i32 %384, -65536
  %386 = add i32 %372, %357
  %387 = add i32 %386, %368
  %388 = add i32 %387, %385
  %389 = add i32 %388, %381
  %390 = shl i32 %380, 16
  %391 = or i32 %390, %382
  %392 = and i32 %295, -2147483648
  %393 = lshr i32 %389, 9
  %394 = or i32 %392, %393
  %395 = or i32 %394, 1065353216
  %396 = bitcast i32 %395 to float
  %397 = fadd float %396, 4.915200e+04
  %398 = fadd float %397, -4.915200e+04
  %399 = fsub float %396, %398
  %400 = bitcast float %397 to i32
  %401 = or i32 %392, 679477248
  %402 = shl i32 %391, 5
  %403 = and i32 %402, 8388576
  %404 = or i32 %403, %401
  %405 = bitcast i32 %404 to float
  %406 = bitcast i32 %401 to float
  %407 = fsub float %405, %406
  %408 = or i32 %392, 872415232
  %409 = shl i32 %389, 14
  %410 = and i32 %409, 8372224
  %411 = lshr i32 %380, 2
  %412 = and i32 %411, 16383
  %413 = or i32 %412, %408
  %414 = or i32 %413, %410
  %415 = bitcast i32 %414 to float
  %416 = bitcast i32 %408 to float
  %417 = fsub float %415, %416
  %418 = fadd float %417, %399
  %419 = fsub float %399, %418
  %420 = fadd float %417, %419
  %421 = fadd float %407, %420
  %422 = bitcast float %418 to i32
  %423 = and i32 %422, -4096
  %424 = bitcast i32 %423 to float
  %425 = fsub float %418, %424
  %426 = fmul float %424, 0x4019220000000000
  %427 = fmul float %425, 0x4019220000000000
  %428 = fmul float %424, 0xBEF2AEEF40000000
  %429 = fmul float %421, 0x401921FB60000000
  %430 = fmul float %425, 0xBEF2AEEF40000000
  %431 = fadd float %428, %427
  %432 = fadd float %429, %430
  %433 = fadd float %431, %432
  %434 = fadd float %426, %433
  %435 = fsub float %426, %434
  %436 = fadd float %433, %435
  %437 = fcmp ogt float %297, 0x3EB0000000000000
  %438 = fcmp ole float %297, 0x3EB0000000000000
  %439 = select i1 %438, i32 %295, i32 0
  %440 = bitcast float %434 to i32
  %441 = select i1 %437, i32 %440, i32 0
  %442 = or i32 %441, %439
  %443 = bitcast i32 %442 to float
  %444 = select i1 %437, float %436, float 0.000000e+00
  %445 = fmul float %443, %443
  %446 = shl i32 %400, 2
  %447 = and i32 %446, 1020
  %off__ocl_svml_ssin_data19 = getelementptr i8, i8 addrspace(2)* %constBase, i32 144
  %448 = bitcast i8 addrspace(2)* %off__ocl_svml_ssin_data19 to float addrspace(2)*
  %449 = getelementptr inbounds float, float addrspace(2)* %448, i32 %447
  %450 = load float, float addrspace(2)* %449, align 1, !tbaa !81
  %.sum56.i.i = or i32 %447, 1
  %451 = getelementptr inbounds float, float addrspace(2)* %448, i32 %.sum56.i.i
  %452 = load float, float addrspace(2)* %451, align 1, !tbaa !81
  %.sum78.i.i = or i32 %447, 2
  %453 = getelementptr inbounds float, float addrspace(2)* %448, i32 %.sum78.i.i
  %454 = load float, float addrspace(2)* %453, align 1, !tbaa !81
  %.sum910.i.i = or i32 %447, 3
  %455 = getelementptr inbounds float, float addrspace(2)* %448, i32 %.sum910.i.i
  %456 = load float, float addrspace(2)* %455, align 1, !tbaa !81
  %457 = fmul float %450, %443
  %458 = fmul float %456, %443
  %459 = fadd float %452, %458
  %460 = fadd float %457, %459
  %461 = fsub float %452, %459
  %462 = fadd float %458, %461
  %463 = fsub float %459, %460
  %464 = fadd float %457, %463
  %465 = fadd float %462, %464
  %466 = fmul float %445, 0x3F81110B80000000
  %467 = fadd float %466, 0xBFC5555560000000
  %468 = fmul float %445, %467
  %469 = fmul float %443, %468
  %470 = fadd float %450, %456
  %471 = fmul float %470, %469
  %472 = fmul float %445, 0x3FA5554F80000000
  %473 = fadd float %472, -5.000000e-01
  %474 = fmul float %445, %473
  %475 = fmul float %452, %474
  %476 = fmul float %452, %443
  %477 = fsub float %470, %476
  %478 = fmul float %444, %477
  %479 = fadd float %454, %478
  %480 = fadd float %479, %475
  %481 = fadd float %480, %471
  %482 = fadd float %465, %481
  %483 = fadd float %460, %482
  %. = select i1 %332, float 0x7FFFFFFFE0000000, float %483
  br label %_Z3sinf.exit

_Z3sinf.exit:                                     ; preds = %329, %.thread.i.i
  %.0.i = phi float [ %328, %.thread.i.i ], [ %., %329 ]
  %484 = fmul float %.0.i, 0x4029666660000000
  %485 = fmul float %484, 0x3FF3333340000000
  %486 = fmul float %tick, 0x3F9A9FBE80000000
  %487 = bitcast float %486 to i32
  %488 = and i32 %487, 2147483647
  %489 = bitcast i32 %488 to float
  %490 = fcmp ogt float %489, 1.000000e+04
  br i1 %490, label %521, label %.thread.i.i1

.thread.i.i1:                                     ; preds = %_Z3sinf.exit
  %491 = and i32 %487, -2147483648
  %492 = fmul float %489, 0x3FD45F3060000000
  %493 = fadd float %492, 0x4168000000000000
  %494 = bitcast float %493 to i32
  %495 = shl i32 %494, 31
  %496 = fadd float %493, 0xC168000000000000
  %497 = fmul float %496, 3.140625e+00
  %498 = fsub float %489, %497
  %499 = fmul float %496, 0x3F4FB40000000000
  %500 = fsub float %498, %499
  %501 = fmul float %496, 0x3E84440000000000
  %502 = fsub float %500, %501
  %503 = fmul float %496, 0x3D968C2340000000
  %504 = fsub float %502, %503
  %505 = fmul float %504, %504
  %506 = bitcast float %504 to i32
  %507 = xor i32 %506, %495
  %508 = bitcast i32 %507 to float
  %509 = fmul float %505, 0x3EC5DBDF00000000
  %510 = fadd float %509, 0xBF29F6FFE0000000
  %511 = fmul float %505, %510
  %512 = fadd float %511, 0x3F8110ED40000000
  %513 = fmul float %505, %512
  %514 = fadd float %513, 0xBFC55554C0000000
  %515 = fmul float %505, %514
  %516 = fmul float %508, %515
  %517 = fadd float %508, %516
  %518 = bitcast float %517 to i32
  %519 = xor i32 %518, %491
  %520 = bitcast i32 %519 to float
  br label %_Z3sinf.exit8

; <label>:521                                     ; preds = %_Z3sinf.exit
  %522 = and i32 %487, 2139095040
  %523 = bitcast i32 %522 to float
  %524 = fcmp oeq float %523, 0x7FF0000000000000
  %525 = lshr i32 %487, 23
  %526 = and i32 %525, 255
  %527 = mul i32 %526, 3
  %off__ocl_svml_trig_reduction_data23 = getelementptr i8, i8 addrspace(2)* %constBase, i32 4308
  %528 = bitcast i8 addrspace(2)* %off__ocl_svml_trig_reduction_data23 to float addrspace(2)*
  %529 = getelementptr inbounds float, float addrspace(2)* %528, i32 %527
  %530 = load float, float addrspace(2)* %529, align 1, !tbaa !81
  %.sum.i.i2 = add i32 %527, 1
  %531 = getelementptr inbounds float, float addrspace(2)* %528, i32 %.sum.i.i2
  %532 = load float, float addrspace(2)* %531, align 1, !tbaa !81
  %.sum4.i.i3 = add i32 %527, 2
  %533 = getelementptr inbounds float, float addrspace(2)* %528, i32 %.sum4.i.i3
  %534 = load float, float addrspace(2)* %533, align 1, !tbaa !81
  %535 = bitcast float %530 to i32
  %536 = bitcast float %532 to i32
  %537 = bitcast float %534 to i32
  %538 = lshr i32 %535, 16
  %539 = and i32 %535, 65535
  %540 = lshr i32 %536, 16
  %541 = and i32 %536, 65535
  %542 = lshr i32 %537, 16
  %543 = and i32 %537, 65535
  %544 = lshr i32 %487, 16
  %545 = and i32 %544, 127
  %546 = or i32 %545, 128
  %547 = and i32 %487, 65535
  %548 = mul i32 %539, %546
  %549 = mul i32 %540, %546
  %550 = mul i32 %541, %546
  %551 = mul i32 %542, %546
  %552 = mul i32 %543, %546
  %553 = mul i32 %538, %547
  %554 = mul i32 %539, %547
  %555 = mul i32 %540, %547
  %556 = mul i32 %541, %547
  %557 = mul i32 %542, %547
  %558 = lshr i32 %557, 16
  %559 = lshr i32 %556, 16
  %560 = lshr i32 %555, 16
  %561 = add i32 %559, %550
  %562 = and i32 %556, 65535
  %563 = and i32 %555, 65535
  %564 = and i32 %554, 65535
  %565 = add i32 %561, %563
  %566 = add i32 %553, %548
  %567 = lshr i32 %552, 16
  %568 = add i32 %562, %551
  %569 = add i32 %568, %558
  %570 = add i32 %569, %567
  %571 = lshr i32 %570, 16
  %572 = add i32 %565, %571
  %573 = lshr i32 %572, 16
  %574 = and i32 %570, 65535
  %575 = shl i32 %566, 16
  %576 = add i32 %575, %554
  %577 = and i32 %576, -65536
  %578 = add i32 %564, %549
  %579 = add i32 %578, %560
  %580 = add i32 %579, %577
  %581 = add i32 %580, %573
  %582 = shl i32 %572, 16
  %583 = or i32 %582, %574
  %584 = and i32 %487, -2147483648
  %585 = lshr i32 %581, 9
  %586 = or i32 %584, %585
  %587 = or i32 %586, 1065353216
  %588 = bitcast i32 %587 to float
  %589 = fadd float %588, 4.915200e+04
  %590 = fadd float %589, -4.915200e+04
  %591 = fsub float %588, %590
  %592 = bitcast float %589 to i32
  %593 = or i32 %584, 679477248
  %594 = shl i32 %583, 5
  %595 = and i32 %594, 8388576
  %596 = or i32 %595, %593
  %597 = bitcast i32 %596 to float
  %598 = bitcast i32 %593 to float
  %599 = fsub float %597, %598
  %600 = or i32 %584, 872415232
  %601 = shl i32 %581, 14
  %602 = and i32 %601, 8372224
  %603 = lshr i32 %572, 2
  %604 = and i32 %603, 16383
  %605 = or i32 %604, %600
  %606 = or i32 %605, %602
  %607 = bitcast i32 %606 to float
  %608 = bitcast i32 %600 to float
  %609 = fsub float %607, %608
  %610 = fadd float %609, %591
  %611 = fsub float %591, %610
  %612 = fadd float %609, %611
  %613 = fadd float %599, %612
  %614 = bitcast float %610 to i32
  %615 = and i32 %614, -4096
  %616 = bitcast i32 %615 to float
  %617 = fsub float %610, %616
  %618 = fmul float %616, 0x4019220000000000
  %619 = fmul float %617, 0x4019220000000000
  %620 = fmul float %616, 0xBEF2AEEF40000000
  %621 = fmul float %613, 0x401921FB60000000
  %622 = fmul float %617, 0xBEF2AEEF40000000
  %623 = fadd float %620, %619
  %624 = fadd float %621, %622
  %625 = fadd float %623, %624
  %626 = fadd float %618, %625
  %627 = fsub float %618, %626
  %628 = fadd float %625, %627
  %629 = fcmp ogt float %489, 0x3EB0000000000000
  %630 = fcmp ole float %489, 0x3EB0000000000000
  %631 = select i1 %630, i32 %487, i32 0
  %632 = bitcast float %626 to i32
  %633 = select i1 %629, i32 %632, i32 0
  %634 = or i32 %633, %631
  %635 = bitcast i32 %634 to float
  %636 = select i1 %629, float %628, float 0.000000e+00
  %637 = fmul float %635, %635
  %638 = shl i32 %592, 2
  %639 = and i32 %638, 1020
  %off__ocl_svml_ssin_data11 = getelementptr i8, i8 addrspace(2)* %constBase, i32 144
  %640 = bitcast i8 addrspace(2)* %off__ocl_svml_ssin_data11 to float addrspace(2)*
  %641 = getelementptr inbounds float, float addrspace(2)* %640, i32 %639
  %642 = load float, float addrspace(2)* %641, align 1, !tbaa !81
  %.sum56.i.i4 = or i32 %639, 1
  %643 = getelementptr inbounds float, float addrspace(2)* %640, i32 %.sum56.i.i4
  %644 = load float, float addrspace(2)* %643, align 1, !tbaa !81
  %.sum78.i.i5 = or i32 %639, 2
  %645 = getelementptr inbounds float, float addrspace(2)* %640, i32 %.sum78.i.i5
  %646 = load float, float addrspace(2)* %645, align 1, !tbaa !81
  %.sum910.i.i6 = or i32 %639, 3
  %647 = getelementptr inbounds float, float addrspace(2)* %640, i32 %.sum910.i.i6
  %648 = load float, float addrspace(2)* %647, align 1, !tbaa !81
  %649 = fmul float %642, %635
  %650 = fmul float %648, %635
  %651 = fadd float %644, %650
  %652 = fadd float %649, %651
  %653 = fsub float %644, %651
  %654 = fadd float %650, %653
  %655 = fsub float %651, %652
  %656 = fadd float %649, %655
  %657 = fadd float %654, %656
  %658 = fmul float %637, 0x3F81110B80000000
  %659 = fadd float %658, 0xBFC5555560000000
  %660 = fmul float %637, %659
  %661 = fmul float %635, %660
  %662 = fadd float %642, %648
  %663 = fmul float %662, %661
  %664 = fmul float %637, 0x3FA5554F80000000
  %665 = fadd float %664, -5.000000e-01
  %666 = fmul float %637, %665
  %667 = fmul float %644, %666
  %668 = fmul float %644, %635
  %669 = fsub float %662, %668
  %670 = fmul float %636, %669
  %671 = fadd float %646, %670
  %672 = fadd float %671, %667
  %673 = fadd float %672, %663
  %674 = fadd float %657, %673
  %675 = fadd float %652, %674
  %.120 = select i1 %524, float 0x7FFFFFFFE0000000, float %675
  br label %_Z3sinf.exit8

_Z3sinf.exit8:                                    ; preds = %521, %.thread.i.i1
  %.0.i7 = phi float [ %520, %.thread.i.i1 ], [ %.120, %521 ]
  %676 = fmul float %.0.i7, 0x4029666660000000
  %677 = fmul float %676, 0x3FF2666660000000
  %678 = fadd float %485, 0xC019666660000000
  %679 = fadd float %677, 0x4029666660000000
  %assembled.vect89 = insertelement <4 x float> undef, float %678, i32 0
  %assembled.vect90 = insertelement <4 x float> %assembled.vect89, float 2.850000e+01, i32 1
  %assembled.vect91 = insertelement <4 x float> %assembled.vect90, float %679, i32 2
  %assembled.vect92 = insertelement <4 x float> %assembled.vect91, float 0.000000e+00, i32 3
  store <4 x float> %assembled.vect92, <4 x float> addrspace(1)* %positions, align 16, !tbaa !77
  %680 = fadd float %485, 0x4029666660000000
  %assembled.vect93 = insertelement <4 x float> undef, float %680, i32 0
  %assembled.vect94 = insertelement <4 x float> %assembled.vect93, float 2.850000e+01, i32 1
  %assembled.vect95 = insertelement <4 x float> %assembled.vect94, float %677, i32 2
  %assembled.vect96 = insertelement <4 x float> %assembled.vect95, float 0.000000e+00, i32 3
  %681 = getelementptr inbounds <4 x float>, <4 x float> addrspace(1)* %positions, i32 127
  store <4 x float> %assembled.vect96, <4 x float> addrspace(1)* %681, align 16, !tbaa !77
  ret void

; <label>:682                                     ; preds = %._crit_edge97
  %683 = sub i32 11, %z.0119
  %684 = add nsw i32 %683, -1
  br label %687

; <label>:685                                     ; preds = %._crit_edge97
  %686 = sub i32 2, %z.0119
  br label %687

; <label>:687                                     ; preds = %685, %682
  %688 = phi i32 [ %686, %685 ], [ %684, %682 ]
  %689 = sub nsw i32 7, %688
  %690 = add nsw i32 %8, %689
  %691 = getelementptr inbounds i32, i32 addrspace(1)* %neighbours, i32 %690
  %692 = load i32, i32 addrspace(1)* %691, align 4, !tbaa !79
  %693 = icmp sgt i32 %692, -1
  br i1 %693, label %694, label %._crit_edge97.1

; <label>:694                                     ; preds = %687
  %695 = icmp sgt i32 %689, 2
  br i1 %695, label %696, label %._crit_edge98.1

; <label>:696                                     ; preds = %694
  %697 = call float @genx.GenISA.sqrt.f32(float 0x3F947AE160000000)
  br label %._crit_edge98.1

._crit_edge98.1:                                  ; preds = %694, %696
  %rest.0.1 = phi float [ %697, %696 ], [ 0x3FB99999A0000000, %694 ]
  %698 = icmp sgt i32 %689, 4
  br i1 %698, label %699, label %._crit_edge99.1

; <label>:699                                     ; preds = %._crit_edge98.1
  %700 = fmul float %rest.0.1, 2.000000e+00
  %701 = fmul float %700, %700
  %702 = fmul float %rest.0.1, %rest.0.1
  %703 = fadd float %701, %702
  %704 = call float @genx.GenISA.sqrt.f32(float %703)
  br label %._crit_edge99.1

._crit_edge99.1:                                  ; preds = %._crit_edge98.1, %699
  %rest.1.1 = phi float [ %704, %699 ], [ %rest.0.1, %._crit_edge98.1 ]
  %705 = load <4 x float>, <4 x float> addrspace(1)* %9, align 16, !tbaa !77
  %scalar38.1 = extractelement <4 x float> %705, i32 0
  %scalar39.1 = extractelement <4 x float> %705, i32 1
  %scalar40.1 = extractelement <4 x float> %705, i32 2
  %scalar41.1 = extractelement <4 x float> %705, i32 3
  %706 = getelementptr inbounds <4 x float>, <4 x float> addrspace(1)* %positions, i32 %692
  %707 = load <4 x float>, <4 x float> addrspace(1)* %706, align 16, !tbaa !77
  %scalar42.1 = extractelement <4 x float> %707, i32 0
  %scalar43.1 = extractelement <4 x float> %707, i32 1
  %scalar44.1 = extractelement <4 x float> %707, i32 2
  %scalar45.1 = extractelement <4 x float> %707, i32 3
  %708 = fsub float %scalar38.1, %scalar42.1
  %709 = fsub float %scalar39.1, %scalar43.1
  %710 = fsub float %scalar40.1, %scalar44.1
  %711 = fsub float %scalar41.1, %scalar45.1
  %712 = fmul float %711, %711
  %713 = fmul float %710, %710
  %714 = fadd float %713, %712
  %715 = fmul float %709, %709
  %716 = fadd float %715, %714
  %717 = fmul float %708, %708
  %718 = fadd float %717, %716
  %719 = call float @genx.GenISA.sqrt.f32(float %718)
  %720 = fsub float %719, %rest.1.1
  %721 = fdiv float %720, %719, !fpmath !80
  %722 = fmul float %721, 5.000000e-01
  %723 = fmul float %722, 0x3FECCCCCC0000000
  %724 = fmul float %708, %723
  %725 = fmul float %709, %723
  %726 = fmul float %710, %723
  %727 = fmul float %711, %723
  %728 = fsub float %scalar38.1, %724
  %729 = fsub float %scalar39.1, %725
  %730 = fsub float %scalar40.1, %726
  %731 = fsub float %scalar41.1, %727
  %assembled.vect.1 = insertelement <4 x float> undef, float %728, i32 0
  %assembled.vect70.1 = insertelement <4 x float> %assembled.vect.1, float %729, i32 1
  %assembled.vect71.1 = insertelement <4 x float> %assembled.vect70.1, float %730, i32 2
  %assembled.vect72.1 = insertelement <4 x float> %assembled.vect71.1, float %731, i32 3
  store <4 x float> %assembled.vect72.1, <4 x float> addrspace(1)* %9, align 16, !tbaa !77
  %732 = load <4 x float>, <4 x float> addrspace(1)* %706, align 16, !tbaa !77
  %scalar50.1 = extractelement <4 x float> %732, i32 0
  %scalar51.1 = extractelement <4 x float> %732, i32 1
  %scalar52.1 = extractelement <4 x float> %732, i32 2
  %scalar53.1 = extractelement <4 x float> %732, i32 3
  %733 = fadd float %scalar50.1, %724
  %734 = fadd float %scalar51.1, %725
  %735 = fadd float %scalar52.1, %726
  %736 = fadd float %scalar53.1, %727
  %assembled.vect73.1 = insertelement <4 x float> undef, float %733, i32 0
  %assembled.vect74.1 = insertelement <4 x float> %assembled.vect73.1, float %734, i32 1
  %assembled.vect75.1 = insertelement <4 x float> %assembled.vect74.1, float %735, i32 2
  %assembled.vect76.1 = insertelement <4 x float> %assembled.vect75.1, float %736, i32 3
  store <4 x float> %assembled.vect76.1, <4 x float> addrspace(1)* %706, align 16, !tbaa !77
  br label %._crit_edge97.1

._crit_edge97.1:                                  ; preds = %687, %._crit_edge99.1
  %737 = or i32 %z.0119, 2
  %738 = icmp slt i32 %737, 4
  br i1 %738, label %742, label %739

; <label>:739                                     ; preds = %._crit_edge97.1
  %740 = sub i32 10, %z.0119
  %741 = add nsw i32 %740, -1
  br label %744

; <label>:742                                     ; preds = %._crit_edge97.1
  %743 = sub i32 1, %z.0119
  br label %744

; <label>:744                                     ; preds = %742, %739
  %745 = phi i32 [ %743, %742 ], [ %741, %739 ]
  %746 = sub nsw i32 7, %745
  %747 = add nsw i32 %8, %746
  %748 = getelementptr inbounds i32, i32 addrspace(1)* %neighbours, i32 %747
  %749 = load i32, i32 addrspace(1)* %748, align 4, !tbaa !79
  %750 = icmp sgt i32 %749, -1
  br i1 %750, label %751, label %._crit_edge97.2

; <label>:751                                     ; preds = %744
  %752 = icmp sgt i32 %746, 2
  br i1 %752, label %753, label %._crit_edge98.2

; <label>:753                                     ; preds = %751
  %754 = call float @genx.GenISA.sqrt.f32(float 0x3F947AE160000000)
  br label %._crit_edge98.2

._crit_edge98.2:                                  ; preds = %751, %753
  %rest.0.2 = phi float [ %754, %753 ], [ 0x3FB99999A0000000, %751 ]
  %755 = icmp sgt i32 %746, 4
  br i1 %755, label %756, label %._crit_edge99.2

; <label>:756                                     ; preds = %._crit_edge98.2
  %757 = fmul float %rest.0.2, 2.000000e+00
  %758 = fmul float %757, %757
  %759 = fmul float %rest.0.2, %rest.0.2
  %760 = fadd float %758, %759
  %761 = call float @genx.GenISA.sqrt.f32(float %760)
  br label %._crit_edge99.2

._crit_edge99.2:                                  ; preds = %._crit_edge98.2, %756
  %rest.1.2 = phi float [ %761, %756 ], [ %rest.0.2, %._crit_edge98.2 ]
  %762 = load <4 x float>, <4 x float> addrspace(1)* %9, align 16, !tbaa !77
  %scalar38.2 = extractelement <4 x float> %762, i32 0
  %scalar39.2 = extractelement <4 x float> %762, i32 1
  %scalar40.2 = extractelement <4 x float> %762, i32 2
  %scalar41.2 = extractelement <4 x float> %762, i32 3
  %763 = getelementptr inbounds <4 x float>, <4 x float> addrspace(1)* %positions, i32 %749
  %764 = load <4 x float>, <4 x float> addrspace(1)* %763, align 16, !tbaa !77
  %scalar42.2 = extractelement <4 x float> %764, i32 0
  %scalar43.2 = extractelement <4 x float> %764, i32 1
  %scalar44.2 = extractelement <4 x float> %764, i32 2
  %scalar45.2 = extractelement <4 x float> %764, i32 3
  %765 = fsub float %scalar38.2, %scalar42.2
  %766 = fsub float %scalar39.2, %scalar43.2
  %767 = fsub float %scalar40.2, %scalar44.2
  %768 = fsub float %scalar41.2, %scalar45.2
  %769 = fmul float %768, %768
  %770 = fmul float %767, %767
  %771 = fadd float %770, %769
  %772 = fmul float %766, %766
  %773 = fadd float %772, %771
  %774 = fmul float %765, %765
  %775 = fadd float %774, %773
  %776 = call float @genx.GenISA.sqrt.f32(float %775)
  %777 = fsub float %776, %rest.1.2
  %778 = fdiv float %777, %776, !fpmath !80
  %779 = fmul float %778, 5.000000e-01
  %780 = fmul float %779, 0x3FECCCCCC0000000
  %781 = fmul float %765, %780
  %782 = fmul float %766, %780
  %783 = fmul float %767, %780
  %784 = fmul float %768, %780
  %785 = fsub float %scalar38.2, %781
  %786 = fsub float %scalar39.2, %782
  %787 = fsub float %scalar40.2, %783
  %788 = fsub float %scalar41.2, %784
  %assembled.vect.2 = insertelement <4 x float> undef, float %785, i32 0
  %assembled.vect70.2 = insertelement <4 x float> %assembled.vect.2, float %786, i32 1
  %assembled.vect71.2 = insertelement <4 x float> %assembled.vect70.2, float %787, i32 2
  %assembled.vect72.2 = insertelement <4 x float> %assembled.vect71.2, float %788, i32 3
  store <4 x float> %assembled.vect72.2, <4 x float> addrspace(1)* %9, align 16, !tbaa !77
  %789 = load <4 x float>, <4 x float> addrspace(1)* %763, align 16, !tbaa !77
  %scalar50.2 = extractelement <4 x float> %789, i32 0
  %scalar51.2 = extractelement <4 x float> %789, i32 1
  %scalar52.2 = extractelement <4 x float> %789, i32 2
  %scalar53.2 = extractelement <4 x float> %789, i32 3
  %790 = fadd float %scalar50.2, %781
  %791 = fadd float %scalar51.2, %782
  %792 = fadd float %scalar52.2, %783
  %793 = fadd float %scalar53.2, %784
  %assembled.vect73.2 = insertelement <4 x float> undef, float %790, i32 0
  %assembled.vect74.2 = insertelement <4 x float> %assembled.vect73.2, float %791, i32 1
  %assembled.vect75.2 = insertelement <4 x float> %assembled.vect74.2, float %792, i32 2
  %assembled.vect76.2 = insertelement <4 x float> %assembled.vect75.2, float %793, i32 3
  store <4 x float> %assembled.vect76.2, <4 x float> addrspace(1)* %763, align 16, !tbaa !77
  br label %._crit_edge97.2

._crit_edge97.2:                                  ; preds = %744, %._crit_edge99.2
  %794 = or i32 %z.0119, 3
  %795 = icmp slt i32 %794, 4
  br i1 %795, label %799, label %796

; <label>:796                                     ; preds = %._crit_edge97.2
  %797 = sub i32 9, %z.0119
  %798 = add nsw i32 %797, -1
  br label %801

; <label>:799                                     ; preds = %._crit_edge97.2
  %800 = sub i32 0, %z.0119
  br label %801

; <label>:801                                     ; preds = %799, %796
  %802 = phi i32 [ %800, %799 ], [ %798, %796 ]
  %803 = sub nsw i32 7, %802
  %804 = add nsw i32 %8, %803
  %805 = getelementptr inbounds i32, i32 addrspace(1)* %neighbours, i32 %804
  %806 = load i32, i32 addrspace(1)* %805, align 4, !tbaa !79
  %807 = icmp sgt i32 %806, -1
  br i1 %807, label %808, label %._crit_edge97.3

; <label>:808                                     ; preds = %801
  %809 = icmp sgt i32 %803, 2
  br i1 %809, label %810, label %._crit_edge98.3

; <label>:810                                     ; preds = %808
  %811 = call float @genx.GenISA.sqrt.f32(float 0x3F947AE160000000)
  br label %._crit_edge98.3

._crit_edge98.3:                                  ; preds = %808, %810
  %rest.0.3 = phi float [ %811, %810 ], [ 0x3FB99999A0000000, %808 ]
  %812 = icmp sgt i32 %803, 4
  br i1 %812, label %813, label %._crit_edge99.3

; <label>:813                                     ; preds = %._crit_edge98.3
  %814 = fmul float %rest.0.3, 2.000000e+00
  %815 = fmul float %814, %814
  %816 = fmul float %rest.0.3, %rest.0.3
  %817 = fadd float %815, %816
  %818 = call float @genx.GenISA.sqrt.f32(float %817)
  br label %._crit_edge99.3

._crit_edge99.3:                                  ; preds = %._crit_edge98.3, %813
  %rest.1.3 = phi float [ %818, %813 ], [ %rest.0.3, %._crit_edge98.3 ]
  %819 = load <4 x float>, <4 x float> addrspace(1)* %9, align 16, !tbaa !77
  %scalar38.3 = extractelement <4 x float> %819, i32 0
  %scalar39.3 = extractelement <4 x float> %819, i32 1
  %scalar40.3 = extractelement <4 x float> %819, i32 2
  %scalar41.3 = extractelement <4 x float> %819, i32 3
  %820 = getelementptr inbounds <4 x float>, <4 x float> addrspace(1)* %positions, i32 %806
  %821 = load <4 x float>, <4 x float> addrspace(1)* %820, align 16, !tbaa !77
  %scalar42.3 = extractelement <4 x float> %821, i32 0
  %scalar43.3 = extractelement <4 x float> %821, i32 1
  %scalar44.3 = extractelement <4 x float> %821, i32 2
  %scalar45.3 = extractelement <4 x float> %821, i32 3
  %822 = fsub float %scalar38.3, %scalar42.3
  %823 = fsub float %scalar39.3, %scalar43.3
  %824 = fsub float %scalar40.3, %scalar44.3
  %825 = fsub float %scalar41.3, %scalar45.3
  %826 = fmul float %825, %825
  %827 = fmul float %824, %824
  %828 = fadd float %827, %826
  %829 = fmul float %823, %823
  %830 = fadd float %829, %828
  %831 = fmul float %822, %822
  %832 = fadd float %831, %830
  %833 = call float @genx.GenISA.sqrt.f32(float %832)
  %834 = fsub float %833, %rest.1.3
  %835 = fdiv float %834, %833, !fpmath !80
  %836 = fmul float %835, 5.000000e-01
  %837 = fmul float %836, 0x3FECCCCCC0000000
  %838 = fmul float %822, %837
  %839 = fmul float %823, %837
  %840 = fmul float %824, %837
  %841 = fmul float %825, %837
  %842 = fsub float %scalar38.3, %838
  %843 = fsub float %scalar39.3, %839
  %844 = fsub float %scalar40.3, %840
  %845 = fsub float %scalar41.3, %841
  %assembled.vect.3 = insertelement <4 x float> undef, float %842, i32 0
  %assembled.vect70.3 = insertelement <4 x float> %assembled.vect.3, float %843, i32 1
  %assembled.vect71.3 = insertelement <4 x float> %assembled.vect70.3, float %844, i32 2
  %assembled.vect72.3 = insertelement <4 x float> %assembled.vect71.3, float %845, i32 3
  store <4 x float> %assembled.vect72.3, <4 x float> addrspace(1)* %9, align 16, !tbaa !77
  %846 = load <4 x float>, <4 x float> addrspace(1)* %820, align 16, !tbaa !77
  %scalar50.3 = extractelement <4 x float> %846, i32 0
  %scalar51.3 = extractelement <4 x float> %846, i32 1
  %scalar52.3 = extractelement <4 x float> %846, i32 2
  %scalar53.3 = extractelement <4 x float> %846, i32 3
  %847 = fadd float %scalar50.3, %838
  %848 = fadd float %scalar51.3, %839
  %849 = fadd float %scalar52.3, %840
  %850 = fadd float %scalar53.3, %841
  %assembled.vect73.3 = insertelement <4 x float> undef, float %847, i32 0
  %assembled.vect74.3 = insertelement <4 x float> %assembled.vect73.3, float %848, i32 1
  %assembled.vect75.3 = insertelement <4 x float> %assembled.vect74.3, float %849, i32 2
  %assembled.vect76.3 = insertelement <4 x float> %assembled.vect75.3, float %850, i32 3
  store <4 x float> %assembled.vect76.3, <4 x float> addrspace(1)* %820, align 16, !tbaa !77
  br label %._crit_edge97.3

._crit_edge97.3:                                  ; preds = %801, %._crit_edge99.3
  %851 = add nsw i32 %z.0119, 4
  %852 = icmp slt i32 %851, 8
  br i1 %852, label %10, label %._crit_edge
}

; Function Attrs: alwaysinline nounwind
define void @applyForces(<4 x float> addrspace(1)* %forces, <8 x i32> %r0, <8 x i32> %payloadHeader, i16 %localIdX, i16 %localIdY, i16 %localIdZ, i8 addrspace(2)* %constBase) #0 {
  %scalar = extractelement <8 x i32> %payloadHeader, i32 0
  %groupId = extractelement <8 x i32> %r0, i32 1
  %localSize = extractelement <8 x i32> %payloadHeader, i32 3
  %1 = mul i32 %localSize, %groupId
  %2 = zext i16 %localIdX to i32
  %3 = add i32 %1, %2
  %4 = add i32 %3, %scalar
  %5 = getelementptr inbounds <4 x float>, <4 x float> addrspace(1)* %forces, i32 %4
  %6 = load <4 x float>, <4 x float> addrspace(1)* %5, align 16
  %scalar8 = extractelement <4 x float> %6, i32 0
  %assembled.vect = insertelement <4 x float> undef, float %scalar8, i32 0
  %assembled.vect12 = insertelement <4 x float> %assembled.vect, float -2.500000e+02, i32 1
  %assembled.vect14 = shufflevector <4 x float> %assembled.vect12, <4 x float> %6, <4 x i32> <i32 0, i32 1, i32 6, i32 7>
  store <4 x float> %assembled.vect14, <4 x float> addrspace(1)* %5, align 16
  ret void
}

declare float @__builtin_IB_native_sqrtf(float)

declare i32 @__builtin_IB_ctlz(i32, i1)

declare i32 @__builtin_IB_get_global_offset(i32)

declare i16 @__builtin_IB_get_local_id_x()

declare i32 @__builtin_IB_get_local_size(i32)

declare i32 @__builtin_IB_get_group_id(i32)

; Function Attrs: nounwind readnone
declare float @genx.GenISA.sqrt.f32(float) #1

; Function Attrs: nounwind readnone
declare i32 @llvm.ctlz.i32(i32, i1) #1

attributes #0 = { alwaysinline nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-frame-pointer-elim-non-leaf"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { nounwind readnone }

!igc.version = !{!0}
!igc.input.ir = !{!1}
!igc.input.lang.info = !{!1}
!igc.functions = !{!2, !26, !39, !44, !55, !60, !70}
!igc.compiler.options = !{!73, !74}
!igc.inline.constants = !{!75}
!igc.inline.globals = !{}
!igc.global.pointer.info = !{}
!igc.constant.pointer.info = !{}
!igc.enable.FP_CONTRACT = !{}
!igc.inline.programscope.offsets = !{}
!printf.strings.resetFaceNormals = !{}

!0 = !{i32 1, i32 0}
!1 = !{!"ocl", i32 1, i32 2}
!2 = !{void (<4 x float> addrspace(1)*, <8 x i32>, <8 x i32>, i16, i16, i16, i8 addrspace(2)*)* @resetFaceNormals, !3}
!3 = !{!4, !5, !12, !20, !21, !22, !23, !24, !25}
!4 = !{!"function_type", i32 0}
!5 = !{!"implicit_arg_desc", !6, !7, !8, !9, !10, !11}
!6 = !{i32 0}
!7 = !{i32 1}
!8 = !{i32 7}
!9 = !{i32 8}
!10 = !{i32 9}
!11 = !{i32 10}
!12 = !{!"resource_alloc", !13, !14, !15, !16}
!13 = !{!"uavs_num", i32 2}
!14 = !{!"srvs_num", i32 0}
!15 = !{!"samplers_num", i32 0}
!16 = !{!"arg_allocs", !17, !18, !18, !18, !18, !18, !19}
!17 = !{i32 1, null, i32 0}
!18 = !{i32 0, null, null}
!19 = !{i32 1, null, i32 1}
!20 = !{!"opencl_kernel_arg_addr_space", i32 1}
!21 = !{!"opencl_kernel_arg_access_qual", !"none"}
!22 = !{!"opencl_kernel_arg_type", !"float4*"}
!23 = !{!"opencl_kernel_arg_base_type", !"float4*"}
!24 = !{!"opencl_kernel_arg_type_qual", !""}
!25 = !{!"opencl_kernel_arg_name", !"faceNormals"}
!26 = !{void (i32 addrspace(1)*, <4 x float> addrspace(1)*, <4 x float> addrspace(1)*, <8 x i32>, <8 x i32>, i16, i16, i16, i8 addrspace(2)*)* @calculateFaceNormals, !27}
!27 = !{!4, !5, !28, !33, !34, !35, !36, !37, !38}
!28 = !{!"resource_alloc", !29, !14, !15, !30}
!29 = !{!"uavs_num", i32 4}
!30 = !{!"arg_allocs", !17, !19, !31, !18, !18, !18, !18, !18, !32}
!31 = !{i32 1, null, i32 2}
!32 = !{i32 1, null, i32 3}
!33 = !{!"opencl_kernel_arg_addr_space", i32 1, i32 1, i32 1}
!34 = !{!"opencl_kernel_arg_access_qual", !"none", !"none", !"none"}
!35 = !{!"opencl_kernel_arg_type", !"uint*", !"float4*", !"float4*"}
!36 = !{!"opencl_kernel_arg_base_type", !"uint*", !"float4*", !"float4*"}
!37 = !{!"opencl_kernel_arg_type_qual", !"", !"", !""}
!38 = !{!"opencl_kernel_arg_name", !"indexes", !"positions", !"faceNormals"}
!39 = !{void (float addrspace(1)*, <4 x float> addrspace(1)*, i32 addrspace(1)*, <8 x i32>, <8 x i32>, i16, i16, i16, i8 addrspace(2)*)* @averageFaceNormals, !40}
!40 = !{!4, !5, !28, !33, !34, !41, !42, !37, !43}
!41 = !{!"opencl_kernel_arg_type", !"float*", !"float4*", !"int*"}
!42 = !{!"opencl_kernel_arg_base_type", !"float*", !"float4*", !"int*"}
!43 = !{!"opencl_kernel_arg_name", !"vbo", !"faceNormals", !"faceIndexes"}
!44 = !{void (<4 x float> addrspace(1)*, float addrspace(1)*, <8 x i32>, <8 x i32>, i16, i16, i16, i8 addrspace(2)*)* @updateVBO, !45}
!45 = !{!4, !5, !46, !49, !50, !51, !52, !53, !54}
!46 = !{!"resource_alloc", !47, !14, !15, !48}
!47 = !{!"uavs_num", i32 3}
!48 = !{!"arg_allocs", !17, !19, !18, !18, !18, !18, !18, !31}
!49 = !{!"opencl_kernel_arg_addr_space", i32 1, i32 1}
!50 = !{!"opencl_kernel_arg_access_qual", !"none", !"none"}
!51 = !{!"opencl_kernel_arg_type", !"float4*", !"float*"}
!52 = !{!"opencl_kernel_arg_base_type", !"float4*", !"float*"}
!53 = !{!"opencl_kernel_arg_type_qual", !"", !""}
!54 = !{!"opencl_kernel_arg_name", !"positions", !"vbo"}
!55 = !{void (<4 x float> addrspace(1)*, <4 x float> addrspace(1)*, <4 x float> addrspace(1)*, <8 x i32>, <8 x i32>, i16, i16, i16, i8 addrspace(2)*)* @integrateSoftBody, !56}
!56 = !{!4, !5, !28, !33, !34, !57, !58, !37, !59}
!57 = !{!"opencl_kernel_arg_type", !"float4*", !"float4*", !"float4*"}
!58 = !{!"opencl_kernel_arg_base_type", !"float4*", !"float4*", !"float4*"}
!59 = !{!"opencl_kernel_arg_name", !"positions", !"oldPositions", !"forces"}
!60 = !{void (<4 x float> addrspace(1)*, i32 addrspace(1)*, i32 addrspace(1)*, float, i32, <8 x i32>, <8 x i32>, i16, i16, i16, i8 addrspace(2)*)* @satisfyConstraints, !61}
!61 = !{!4, !5, !62, !64, !65, !66, !67, !68, !69}
!62 = !{!"resource_alloc", !29, !14, !15, !63}
!63 = !{!"arg_allocs", !17, !19, !31, !18, !18, !18, !18, !18, !18, !18, !32}
!64 = !{!"opencl_kernel_arg_addr_space", i32 1, i32 1, i32 1, i32 0, i32 0}
!65 = !{!"opencl_kernel_arg_access_qual", !"none", !"none", !"none", !"none", !"none"}
!66 = !{!"opencl_kernel_arg_type", !"float4*", !"int*", !"int*", !"float", !"int"}
!67 = !{!"opencl_kernel_arg_base_type", !"float4*", !"int*", !"int*", !"float", !"int"}
!68 = !{!"opencl_kernel_arg_type_qual", !"", !"", !"", !"", !""}
!69 = !{!"opencl_kernel_arg_name", !"positions", !"neighbours", !"offsets", !"tick", !"startOffset"}
!70 = !{void (<4 x float> addrspace(1)*, <8 x i32>, <8 x i32>, i16, i16, i16, i8 addrspace(2)*)* @applyForces, !71}
!71 = !{!4, !5, !12, !20, !21, !22, !23, !24, !72}
!72 = !{!"opencl_kernel_arg_name", !"forces"}
!73 = !{!"-std=CL1.2"}
!74 = !{!"-kernel-arg-info"}
!75 = !{!76, i32 4}
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!77 = !{!"omnipotent char", !78}
!78 = !{!"Simple C/C++ TBAA"}
!79 = !{!"int", !77}
!80 = !{float 2.500000e+00}
!81 = !{!"float", !77}
